{"id":"https://openalex.org/W1966309783","doi":"https://doi.org/10.1145/2742060.2742062","title":"A Ternary Content Addressable Cell Using a Single Phase Change Memory (PCM)","display_name":"A Ternary Content Addressable Cell Using a Single Phase Change Memory (PCM)","publication_year":2015,"publication_date":"2015-05-19","ids":{"openalex":"https://openalex.org/W1966309783","doi":"https://doi.org/10.1145/2742060.2742062","mag":"1966309783"},"language":"en","primary_location":{"id":"doi:10.1145/2742060.2742062","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2742060.2742062","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 25th edition on Great Lakes Symposium on VLSI","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5030224517","display_name":"Pilin Junsangsri","orcid":"https://orcid.org/0000-0003-1234-5631"},"institutions":[{"id":"https://openalex.org/I12912129","display_name":"Northeastern University","ror":"https://ror.org/04t5xt781","country_code":"US","type":"education","lineage":["https://openalex.org/I12912129"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Pilin Junsangsri","raw_affiliation_strings":["Northeastern University, Boston, USA","[Northeastern University,Boston,USA]"],"affiliations":[{"raw_affiliation_string":"Northeastern University, Boston, USA","institution_ids":["https://openalex.org/I12912129"]},{"raw_affiliation_string":"[Northeastern University,Boston,USA]","institution_ids":["https://openalex.org/I12912129"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5001979328","display_name":"Fabrizio Lombardi","orcid":"https://orcid.org/0000-0003-3152-3245"},"institutions":[{"id":"https://openalex.org/I12912129","display_name":"Northeastern University","ror":"https://ror.org/04t5xt781","country_code":"US","type":"education","lineage":["https://openalex.org/I12912129"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Fabrizio Lombardi","raw_affiliation_strings":["Northeastern University, Boston, USA","[Northeastern University,Boston,USA]"],"affiliations":[{"raw_affiliation_string":"Northeastern University, Boston, USA","institution_ids":["https://openalex.org/I12912129"]},{"raw_affiliation_string":"[Northeastern University,Boston,USA]","institution_ids":["https://openalex.org/I12912129"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5005550142","display_name":"Jie Han","orcid":"https://orcid.org/0000-0002-8849-4994"},"institutions":[{"id":"https://openalex.org/I154425047","display_name":"University of Alberta","ror":"https://ror.org/0160cpw27","country_code":"CA","type":"education","lineage":["https://openalex.org/I154425047"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Jie Han","raw_affiliation_strings":["University of Alberta, Edmonton, AB, Canada"],"affiliations":[{"raw_affiliation_string":"University of Alberta, Edmonton, AB, Canada","institution_ids":["https://openalex.org/I154425047"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5030224517"],"corresponding_institution_ids":["https://openalex.org/I12912129"],"apc_list":null,"apc_paid":null,"fwci":1.6491,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.83452802,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"259","last_page":"264"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9825999736785889,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10714","display_name":"Software-Defined Networks and 5G","score":0.9800999760627747,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/phase-change-memory","display_name":"Phase-change memory","score":0.9021199941635132},{"id":"https://openalex.org/keywords/ternary-operation","display_name":"Ternary operation","score":0.67479008436203},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.49724963307380676},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.441597044467926},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.4111711382865906},{"id":"https://openalex.org/keywords/phase-change","display_name":"Phase change","score":0.33116137981414795},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.20126673579216003},{"id":"https://openalex.org/keywords/thermodynamics","display_name":"Thermodynamics","score":0.07937636971473694},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.05844402313232422}],"concepts":[{"id":"https://openalex.org/C64142963","wikidata":"https://www.wikidata.org/wiki/Q1153902","display_name":"Phase-change memory","level":3,"score":0.9021199941635132},{"id":"https://openalex.org/C64452783","wikidata":"https://www.wikidata.org/wiki/Q1524945","display_name":"Ternary operation","level":2,"score":0.67479008436203},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.49724963307380676},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.441597044467926},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.4111711382865906},{"id":"https://openalex.org/C133256868","wikidata":"https://www.wikidata.org/wiki/Q7180940","display_name":"Phase change","level":2,"score":0.33116137981414795},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.20126673579216003},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.07937636971473694},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.05844402313232422},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/2742060.2742062","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2742060.2742062","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 25th edition on Great Lakes Symposium on VLSI","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.715.6374","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.715.6374","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.ece.ualberta.ca/%7Ejhan8/publications/PCM-TCAMfinal.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.46000000834465027,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W36204966","https://openalex.org/W1597620877","https://openalex.org/W2008867603","https://openalex.org/W2052846495","https://openalex.org/W2058122340","https://openalex.org/W2060032564","https://openalex.org/W2062143991","https://openalex.org/W2096307231","https://openalex.org/W2115058545","https://openalex.org/W2121208979","https://openalex.org/W2149055332","https://openalex.org/W2156694126"],"related_works":["https://openalex.org/W2550153070","https://openalex.org/W2791399427","https://openalex.org/W1983958623","https://openalex.org/W2178010602","https://openalex.org/W2541696051","https://openalex.org/W2078067390","https://openalex.org/W2110321764","https://openalex.org/W2317775939","https://openalex.org/W2104335563","https://openalex.org/W2163661908"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"the":[3,19,53,56,59,93,108],"novel":[4],"design":[5],"of":[6,42,103,119],"a":[7,25,43,47],"Ternary":[8],"Content":[9],"Addressable":[10],"Memory":[11,29],"(TCAM);":[12],"different":[13],"from":[14],"existing":[15],"designs":[16],"found":[17],"in":[18,58,101,122],"technical":[20],"literature,":[21],"this":[22],"cell":[23,97],"utilizes":[24],"single":[26],"Phase":[27],"Change":[28],"(PCM)":[30],"as":[31,85],"storage":[32,125],"element":[33],"and":[34,46,65,87,113,124],"ambipolarity":[35],"for":[36,52,107],"comparison.":[37],"A":[38],"memory":[39,61,79],"core":[40,62],"consisting":[41],"CMOS":[44],"transistor":[45],"PCM":[48],"is":[49,63,68],"employed":[50],"(1T1P);":[51],"search":[54,109],"operation,":[55,110],"data":[57],"1T1P":[60],"read":[64],"its":[66],"value":[67],"established":[69],"using":[70,81],"two":[71],"differential":[72],"sense":[73],"amplifiers.":[74],"Compared":[75],"with":[76],"other":[77],"non-volatile":[78,95],"cells":[80],"emerging":[82],"technologies":[83],"(such":[84],"PCM-based,":[86],"memristor-based),":[88],"simulation":[89],"results":[90],"show":[91],"that":[92],"proposed":[94],"TCAM":[96],"offer":[98],"significant":[99],"advantages":[100],"terms":[102,118],"power":[104],"dissipation,":[105],"PDP":[106],"write":[111],"time":[112],"reduced":[114],"circuit":[115],"complexity":[116],"(in":[117],"lower":[120],"counts":[121],"transistors":[123],"elements).":[126]},"counts_by_year":[{"year":2022,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":1}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}
