{"id":"https://openalex.org/W2239634269","doi":"https://doi.org/10.1145/2723165","title":"Energy-Efficient All-Spin Cache Hierarchy Using Shift-Based Writes and Multilevel Storage","display_name":"Energy-Efficient All-Spin Cache Hierarchy Using Shift-Based Writes and Multilevel Storage","publication_year":2015,"publication_date":"2015-08-03","ids":{"openalex":"https://openalex.org/W2239634269","doi":"https://doi.org/10.1145/2723165","mag":"2239634269"},"language":"en","primary_location":{"id":"doi:10.1145/2723165","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2723165","pdf_url":null,"source":{"id":"https://openalex.org/S96198239","display_name":"ACM Journal on Emerging Technologies in Computing Systems","issn_l":"1550-4832","issn":["1550-4832","1550-4840"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Journal on Emerging Technologies in Computing Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5045219356","display_name":"Rangharajan Venkatesan","orcid":null},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Rangharajan Venkatesan","raw_affiliation_strings":["Purdue University"],"affiliations":[{"raw_affiliation_string":"Purdue University","institution_ids":["https://openalex.org/I219193219"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019643842","display_name":"Mrigank Sharad","orcid":null},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mrigank Sharad","raw_affiliation_strings":["Purdue University"],"affiliations":[{"raw_affiliation_string":"Purdue University","institution_ids":["https://openalex.org/I219193219"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031161187","display_name":"Kaushik Roy","orcid":"https://orcid.org/0009-0002-3375-2877"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kaushik Roy","raw_affiliation_strings":["Purdue University"],"affiliations":[{"raw_affiliation_string":"Purdue University","institution_ids":["https://openalex.org/I219193219"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5065766721","display_name":"Anand Raghunathan","orcid":"https://orcid.org/0000-0002-4624-564X"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Anand Raghunathan","raw_affiliation_strings":["Purdue University"],"affiliations":[{"raw_affiliation_string":"Purdue University","institution_ids":["https://openalex.org/I219193219"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5045219356"],"corresponding_institution_ids":["https://openalex.org/I219193219"],"apc_list":null,"apc_paid":null,"fwci":0.9864,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.79813839,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"12","issue":"1","first_page":"1","last_page":"27"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7944111227989197},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.708541214466095},{"id":"https://openalex.org/keywords/racetrack-memory","display_name":"Racetrack memory","score":0.5240276455879211},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.49657827615737915},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.49593600630760193},{"id":"https://openalex.org/keywords/memory-hierarchy","display_name":"Memory hierarchy","score":0.4884614050388336},{"id":"https://openalex.org/keywords/write-buffer","display_name":"Write buffer","score":0.48663076758384705},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.4430186450481415},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.4293265640735626},{"id":"https://openalex.org/keywords/computer-data-storage","display_name":"Computer data storage","score":0.4207460284233093},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4056462347507477},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.3882315456867218},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3446269631385803},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.2698386609554291},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.1718130111694336},{"id":"https://openalex.org/keywords/computer-memory","display_name":"Computer memory","score":0.1611352562904358},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1377021074295044},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.13142332434654236},{"id":"https://openalex.org/keywords/memory-refresh","display_name":"Memory refresh","score":0.09888836741447449}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7944111227989197},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.708541214466095},{"id":"https://openalex.org/C43363307","wikidata":"https://www.wikidata.org/wiki/Q1651623","display_name":"Racetrack memory","level":5,"score":0.5240276455879211},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.49657827615737915},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.49593600630760193},{"id":"https://openalex.org/C2778100165","wikidata":"https://www.wikidata.org/wiki/Q1589327","display_name":"Memory hierarchy","level":3,"score":0.4884614050388336},{"id":"https://openalex.org/C89089495","wikidata":"https://www.wikidata.org/wiki/Q8038418","display_name":"Write buffer","level":5,"score":0.48663076758384705},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.4430186450481415},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.4293265640735626},{"id":"https://openalex.org/C194739806","wikidata":"https://www.wikidata.org/wiki/Q66221","display_name":"Computer data storage","level":2,"score":0.4207460284233093},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4056462347507477},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.3882315456867218},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3446269631385803},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.2698386609554291},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.1718130111694336},{"id":"https://openalex.org/C92855701","wikidata":"https://www.wikidata.org/wiki/Q5830907","display_name":"Computer memory","level":3,"score":0.1611352562904358},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1377021074295044},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.13142332434654236},{"id":"https://openalex.org/C87907426","wikidata":"https://www.wikidata.org/wiki/Q6815755","display_name":"Memory refresh","level":4,"score":0.09888836741447449},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2723165","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2723165","pdf_url":null,"source":{"id":"https://openalex.org/S96198239","display_name":"ACM Journal on Emerging Technologies in Computing Systems","issn_l":"1550-4832","issn":["1550-4832","1550-4840"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Journal on Emerging Technologies in Computing Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8999999761581421,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320307102","display_name":"Intel Corporation","ror":"https://ror.org/01ek73717"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":52,"referenced_works":["https://openalex.org/W26091405","https://openalex.org/W68298618","https://openalex.org/W1977595782","https://openalex.org/W1979527452","https://openalex.org/W1980034734","https://openalex.org/W1983739214","https://openalex.org/W2003253302","https://openalex.org/W2003390915","https://openalex.org/W2004934861","https://openalex.org/W2005242923","https://openalex.org/W2009481135","https://openalex.org/W2011081164","https://openalex.org/W2020443390","https://openalex.org/W2020583007","https://openalex.org/W2033056603","https://openalex.org/W2033188264","https://openalex.org/W2043465878","https://openalex.org/W2044486712","https://openalex.org/W2047379549","https://openalex.org/W2047427636","https://openalex.org/W2064977311","https://openalex.org/W2078760460","https://openalex.org/W2080592089","https://openalex.org/W2080739090","https://openalex.org/W2084007230","https://openalex.org/W2087461437","https://openalex.org/W2088213046","https://openalex.org/W2093860851","https://openalex.org/W2101717804","https://openalex.org/W2104225326","https://openalex.org/W2106346024","https://openalex.org/W2106486935","https://openalex.org/W2108048675","https://openalex.org/W2116826022","https://openalex.org/W2118811056","https://openalex.org/W2121290756","https://openalex.org/W2134075114","https://openalex.org/W2136316949","https://openalex.org/W2138459720","https://openalex.org/W2142276919","https://openalex.org/W2142715748","https://openalex.org/W2150047813","https://openalex.org/W2154861937","https://openalex.org/W2155551886","https://openalex.org/W2156648558","https://openalex.org/W2158932701","https://openalex.org/W2171779727","https://openalex.org/W2273440736","https://openalex.org/W3143249011","https://openalex.org/W3143740944","https://openalex.org/W3150612471","https://openalex.org/W4247470388"],"related_works":["https://openalex.org/W1579918296","https://openalex.org/W2033486618","https://openalex.org/W2159742333","https://openalex.org/W2103504359","https://openalex.org/W2915415779","https://openalex.org/W2131901106","https://openalex.org/W1569026695","https://openalex.org/W2389336573","https://openalex.org/W2654056874","https://openalex.org/W3138154119"],"abstract_inverted_index":{"Spintronic":[0],"memories":[1,11,311],"are":[2,152],"considered":[3],"to":[4,13,38,51,123,176,229,341,356,375,386],"be":[5],"promising":[6],"candidates":[7],"for":[8,74,108,288],"future":[9],"on-chip":[10],"due":[12,37],"their":[14,58],"high":[15,28,76],"density,":[16],"nonvolatility,":[17],"and":[18,31,33,47,136,146,218,251,255,274,312,316,334,345,347,352,370,377,381],"near-zero":[19],"leakage.":[20],"However,":[21,149,244],"they":[22],"also":[23],"face":[24],"challenges":[25],"such":[26],"as":[27,66,124,172,293,295],"write":[29,48,134,147,195,249,256],"energy":[30,315,333,351,369,379],"latency":[32],"limited":[34],"read":[35,46,145,254],"speed":[36],"single-ended":[39],"sensing.":[40],"Further,":[41],"the":[42,83,155,159,178,184,208,230,242,284,314,326,362],"conflicting":[43],"requirements":[44],"of":[45,85,92,144,157,162,181,199,307],"operations":[49],"lead":[50],"stringent":[52],"design":[53,217,279],"constraints":[54],"that":[55,70,103],"severely":[56],"compromises":[57],"benefits.":[59],"Recently,":[60],"domain":[61,105],"wall":[62,106],"memory":[63,69,94],"was":[64],"proposed":[65,285],"a":[67,72,86,173,189,204,213,247],"spintronic":[68,310],"has":[71,252],"potential":[73],"very":[75],"density":[77,179],"by":[78],"storing":[79,200,234],"multiple":[80,96],"bits":[81,202],"in":[82,203,332,337,350,368],"domains":[84,97],"ferromagnetic":[87],"nanowire.":[88],"While":[89],"reliable":[90],"operation":[91,250],"DWM":[93,192],"with":[95,128,193,309],"faces":[98],"many":[99],"challenges,":[100],"single-bit":[101],"cells":[102],"utilize":[104],"motion":[107],"writes":[109],"have":[110],"been":[111],"experimentally":[112],"demonstrated":[113],"[Fukami":[114],"et":[115],"al.":[116],"2009].":[117],"This":[118],"bit-cell,":[119],"which":[120,258],"we":[121,168,187,211,266],"refer":[122],"Domain":[125],"Wall":[126],"Memory":[127],"Shift-based":[129],"Write":[130],"(DWM-SW),":[131],"achieves":[132,329,365],"improved":[133,163],"efficiency":[135],"features":[137],"decoupled":[138],"read-write":[139],"paths,":[140],"enabling":[141],"independent":[142],"optimizations":[143],"operations.":[148],"these":[150,264],"benefits":[151,180,318],"achieved":[153],"at":[154,319],"cost":[156],"sacrificing":[158],"original":[160],"goal":[161],"density.":[164,243],"In":[165],"this":[166],"work,":[167],"explore":[169],"multilevel":[170],"storage":[171],"new":[174,190],"direction":[175],"enhance":[177],"DWM-SW.":[182],"At":[183,207],"device":[185],"level,":[186,210],"propose":[188,212,267],"device--multilevel":[191],"shift-based":[194],"(ML-DWM-SW)--that":[196],"is":[197],"capable":[198],"2":[201],"single":[205],"device.":[206],"circuit":[209],"ML-DWM-SW":[214,221,286,327,363],"based":[215],"bit-cell":[216,222,232,287],"layout.":[219],"The":[220],"incurs":[223],"no":[224],"additional":[225,236],"area":[226,317,339,372,383],"overhead":[227],"compared":[228,340,355,374,385],"DWM-SW":[231],"despite":[233],"an":[235,304,342,357],"bit,":[237],"thereby":[238],"achieving":[239],"roughly":[240],"twice":[241],"it":[245],"requires":[246],"two-step":[248],"data-dependent":[253],"energies,":[257],"pose":[259],"unique":[260],"challenges.":[261],"To":[262],"address":[263],"issues,":[265],"suitable":[268],"architectural":[269],"optimizations:":[270],"(i)":[271],"intra-word":[272],"interleaving":[273],"(ii)":[275],"bit":[276],"encoding.":[277],"We":[278,302],"\u201call-spin\u201d":[280],"cache":[281,328,338,344,364],"architectures":[282],"using":[283],"both":[289],"general":[290,296,323],"purpose":[291,297,324],"processors":[292],"well":[294],"graphics":[298],"processing":[299],"units":[300],"(GPGPUs).":[301],"perform":[303],"iso-capacity":[305],"replacement":[306],"SRAM":[308,343,376],"study":[313],"iso-performance":[320],"conditions.":[321],"For":[322,360],"processors,":[325],"10X":[330],"reduction":[331,336,349,367,373,380,384],"4.4X":[335],"2X":[346],"1.7X":[348],"area,":[353],"respectively,":[354],"STT-MRAM":[358],"cache.":[359],"GPGPUs,":[361],"5.3X":[366],"3.6X":[371],"3.5X":[378],"1.9X":[382],"STT-MRAM.":[387]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
