{"id":"https://openalex.org/W2156152281","doi":"https://doi.org/10.1145/2717764.2717781","title":"Automation of Analog IC Layout","display_name":"Automation of Analog IC Layout","publication_year":2015,"publication_date":"2015-03-12","ids":{"openalex":"https://openalex.org/W2156152281","doi":"https://doi.org/10.1145/2717764.2717781","mag":"2156152281"},"language":"en","primary_location":{"id":"doi:10.1145/2717764.2717781","is_oa":true,"landing_page_url":"https://doi.org/10.1145/2717764.2717781","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/2717764.2717781?download=true","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2015 Symposium on International Symposium on Physical Design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://dl.acm.org/doi/pdf/10.1145/2717764.2717781?download=true","any_repository_has_fulltext":null},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5068481936","display_name":"J\u00fcrgen Scheible","orcid":"https://orcid.org/0000-0003-1565-3437"},"institutions":[{"id":"https://openalex.org/I889804353","display_name":"Robert Bosch (Germany)","ror":"https://ror.org/01fe0jt45","country_code":"DE","type":"company","lineage":["https://openalex.org/I889804353"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Juergen Scheible","raw_affiliation_strings":["Robert Bosch Center for Power Electronics, Reutlingen, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Robert Bosch Center for Power Electronics, Reutlingen, Germany","institution_ids":["https://openalex.org/I889804353"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5070654831","display_name":"Jens Lienig","orcid":"https://orcid.org/0000-0002-2140-4587"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"Technische Universit\u00e4t Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Jens Lienig","raw_affiliation_strings":["Dresden University of Technology, Dresden, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dresden University of Technology, Dresden, Germany","institution_ids":["https://openalex.org/I78650965"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":3.4142,"has_fulltext":true,"cited_by_count":65,"citation_normalized_percentile":{"value":0.92983163,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"33","last_page":"40"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/automation","display_name":"Automation","score":0.7509064674377441},{"id":"https://openalex.org/keywords/electronic-design-automation","display_name":"Electronic design automation","score":0.6545099020004272},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.631947934627533},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.5829049348831177},{"id":"https://openalex.org/keywords/analog-multiplier","display_name":"Analog multiplier","score":0.4651748836040497},{"id":"https://openalex.org/keywords/generator","display_name":"Generator (circuit theory)","score":0.4519502818584442},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.4417757987976074},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.44037219882011414},{"id":"https://openalex.org/keywords/state","display_name":"State (computer science)","score":0.4363977909088135},{"id":"https://openalex.org/keywords/mixed-signal-integrated-circuit","display_name":"Mixed-signal integrated circuit","score":0.4362591803073883},{"id":"https://openalex.org/keywords/analogue-electronics","display_name":"Analogue electronics","score":0.43377649784088135},{"id":"https://openalex.org/keywords/analog-signal","display_name":"Analog signal","score":0.33460789918899536},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.29832565784454346},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.23392316699028015},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2213832139968872},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2114071547985077},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.20070743560791016},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.1980641484260559},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.10241186618804932},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.095618337392807},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.09412339329719543}],"concepts":[{"id":"https://openalex.org/C115901376","wikidata":"https://www.wikidata.org/wiki/Q184199","display_name":"Automation","level":2,"score":0.7509064674377441},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.6545099020004272},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.631947934627533},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.5829049348831177},{"id":"https://openalex.org/C98142538","wikidata":"https://www.wikidata.org/wiki/Q485005","display_name":"Analog multiplier","level":4,"score":0.4651748836040497},{"id":"https://openalex.org/C2780992000","wikidata":"https://www.wikidata.org/wiki/Q17016113","display_name":"Generator (circuit theory)","level":3,"score":0.4519502818584442},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.4417757987976074},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.44037219882011414},{"id":"https://openalex.org/C48103436","wikidata":"https://www.wikidata.org/wiki/Q599031","display_name":"State (computer science)","level":2,"score":0.4363977909088135},{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.4362591803073883},{"id":"https://openalex.org/C29074008","wikidata":"https://www.wikidata.org/wiki/Q174925","display_name":"Analogue electronics","level":3,"score":0.43377649784088135},{"id":"https://openalex.org/C13412647","wikidata":"https://www.wikidata.org/wiki/Q174948","display_name":"Analog signal","level":3,"score":0.33460789918899536},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.29832565784454346},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.23392316699028015},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2213832139968872},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2114071547985077},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.20070743560791016},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.1980641484260559},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.10241186618804932},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.095618337392807},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.09412339329719543},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/2717764.2717781","is_oa":true,"landing_page_url":"https://doi.org/10.1145/2717764.2717781","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/2717764.2717781?download=true","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2015 Symposium on International Symposium on Physical Design","raw_type":"proceedings-article"},{"id":"pmh:oai:opus.reutlingen-university.de:835","is_oa":false,"landing_page_url":"https://publikationen.reutlingen-university.de/frontdoor/index/index/docId/835","pdf_url":null,"source":{"id":"https://openalex.org/S4306400499","display_name":"Reutlingen University Academic Bibliography (Reutlingen University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I57589565","host_organization_name":"Reutlingen University","host_organization_lineage":["https://openalex.org/I57589565"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"doc-type:conferenceObject"}],"best_oa_location":{"id":"doi:10.1145/2717764.2717781","is_oa":true,"landing_page_url":"https://doi.org/10.1145/2717764.2717781","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/2717764.2717781?download=true","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2015 Symposium on International Symposium on Physical Design","raw_type":"proceedings-article"},"sustainable_development_goals":[{"score":0.6499999761581421,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2156152281.pdf","grobid_xml":"https://content.openalex.org/works/W2156152281.grobid-xml"},"referenced_works_count":21,"referenced_works":["https://openalex.org/W122493896","https://openalex.org/W617196099","https://openalex.org/W1974312848","https://openalex.org/W1999379572","https://openalex.org/W2021501041","https://openalex.org/W2039537545","https://openalex.org/W2055606474","https://openalex.org/W2057793198","https://openalex.org/W2060455162","https://openalex.org/W2065257040","https://openalex.org/W2071520186","https://openalex.org/W2079773613","https://openalex.org/W2109628924","https://openalex.org/W2138396608","https://openalex.org/W2143436374","https://openalex.org/W2145458600","https://openalex.org/W2147845249","https://openalex.org/W2164205238","https://openalex.org/W2503562753","https://openalex.org/W3145852431","https://openalex.org/W4300833197"],"related_works":["https://openalex.org/W2540146427","https://openalex.org/W2743305891","https://openalex.org/W2295569708","https://openalex.org/W2042338187","https://openalex.org/W4321510758","https://openalex.org/W3205162826","https://openalex.org/W2110346573","https://openalex.org/W2154454108","https://openalex.org/W2610167993","https://openalex.org/W2056740847"],"abstract_inverted_index":{"Physical":[0],"analog":[1,23,44,82,116,123],"IC":[2,14,24],"design":[3,25,102,109,117],"has":[4,40],"not":[5],"been":[6,41],"automated":[7],"to":[8],"the":[9,22,62,76,79],"same":[10],"degree":[11],"as":[12],"digital":[13],"design.":[15],"This":[16],"shortfall":[17],"is":[18,29],"primarily":[19],"rooted":[20],"in":[21,43,46,51],"problem":[26,36],"itself,":[27],"which":[28,112],"considerably":[30],"more":[31],"complex":[32],"even":[33],"for":[34],"small":[35],"sizes.":[37],"Significant":[38],"progress":[39],"made":[42],"automation":[45,118],"several":[47],"R&D":[48],"target":[49],"areas":[50,93],"recent":[52],"years.":[53],"Constraint":[54],"engineering":[55],"and":[56,90,94,104],"generator-based":[57],"module":[58],"approaches":[59],"are":[60],"among":[61],"innovations":[63],"that":[64],"have":[65],"emerged.":[66],"Our":[67],"paper":[68],"will":[69,86],"first":[70],"present":[71,95],"a":[72,99,105],"brief":[73],"review":[74],"of":[75,78,81,122],"state":[77],"art":[80],"layout":[83,101],"automation.":[84],"We":[85],"then":[87],"introduce":[88],"active":[89],"open":[91],"research":[92],"two":[96],"visions":[97],"--":[98,111],"\"continuous":[100],"flow\"":[103,110],"\"bottom-up":[106],"meets":[107],"top-down":[108],"could":[113],"significantly":[114],"push":[115],"towards":[119],"its":[120],"goal":[121],"synthesis.":[124]},"counts_by_year":[{"year":2026,"cited_by_count":3},{"year":2025,"cited_by_count":7},{"year":2024,"cited_by_count":7},{"year":2023,"cited_by_count":10},{"year":2022,"cited_by_count":6},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":10},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":8},{"year":2016,"cited_by_count":5},{"year":2015,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2016-06-24T00:00:00"}