{"id":"https://openalex.org/W2083582831","doi":"https://doi.org/10.1145/2700246","title":"A Cross-Layer Approach for Early-Stage Power Grid Design and Optimization","display_name":"A Cross-Layer Approach for Early-Stage Power Grid Design and Optimization","publication_year":2015,"publication_date":"2015-09-21","ids":{"openalex":"https://openalex.org/W2083582831","doi":"https://doi.org/10.1145/2700246","mag":"2083582831"},"language":"en","primary_location":{"id":"doi:10.1145/2700246","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2700246","pdf_url":null,"source":{"id":"https://openalex.org/S96198239","display_name":"ACM Journal on Emerging Technologies in Computing Systems","issn_l":"1550-4832","issn":["1550-4832","1550-4840"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Journal on Emerging Technologies in Computing Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5054211420","display_name":"Cheng Zhuo","orcid":"https://orcid.org/0000-0002-2610-7522"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Cheng Zhuo","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR","Intel Corporation, Hillsboro, OR#TAB#"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101983402","display_name":"Houle Gan","orcid":"https://orcid.org/0009-0003-9603-6939"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Houle Gan","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR","Intel Corporation, Hillsboro, OR#TAB#"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108309701","display_name":"Wei-Kai Shih","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Wei-Kai Shih","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR","Intel Corporation, Hillsboro, OR#TAB#"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5041910775","display_name":"Alaeddin Aydiner","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Alaeddin A. Aydiner","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR","Intel Corporation, Hillsboro, OR#TAB#"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5054211420"],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":0.7891,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.76276685,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"12","issue":"3","first_page":"1","last_page":"20"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10361","display_name":"Silicon Carbide Semiconductor Technologies","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/power-integrity","display_name":"Power integrity","score":0.6722230911254883},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.589358925819397},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5082582831382751},{"id":"https://openalex.org/keywords/grid","display_name":"Grid","score":0.5000708103179932},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.47388237714767456},{"id":"https://openalex.org/keywords/dynamic-demand","display_name":"Dynamic demand","score":0.452970951795578},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4351404905319214},{"id":"https://openalex.org/keywords/systems-engineering","display_name":"Systems engineering","score":0.33842208981513977},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.32960936427116394},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.323728084564209},{"id":"https://openalex.org/keywords/signal-integrity","display_name":"Signal integrity","score":0.2068098485469818}],"concepts":[{"id":"https://openalex.org/C2777561913","wikidata":"https://www.wikidata.org/wiki/Q19599527","display_name":"Power integrity","level":4,"score":0.6722230911254883},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.589358925819397},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5082582831382751},{"id":"https://openalex.org/C187691185","wikidata":"https://www.wikidata.org/wiki/Q2020720","display_name":"Grid","level":2,"score":0.5000708103179932},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.47388237714767456},{"id":"https://openalex.org/C45872418","wikidata":"https://www.wikidata.org/wiki/Q5318966","display_name":"Dynamic demand","level":3,"score":0.452970951795578},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4351404905319214},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.33842208981513977},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.32960936427116394},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.323728084564209},{"id":"https://openalex.org/C44938667","wikidata":"https://www.wikidata.org/wiki/Q4503810","display_name":"Signal integrity","level":3,"score":0.2068098485469818},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2700246","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2700246","pdf_url":null,"source":{"id":"https://openalex.org/S96198239","display_name":"ACM Journal on Emerging Technologies in Computing Systems","issn_l":"1550-4832","issn":["1550-4832","1550-4840"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Journal on Emerging Technologies in Computing Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":36,"referenced_works":["https://openalex.org/W1598246754","https://openalex.org/W1828505670","https://openalex.org/W1969151367","https://openalex.org/W1982219125","https://openalex.org/W1984655843","https://openalex.org/W2030651811","https://openalex.org/W2045044333","https://openalex.org/W2063668285","https://openalex.org/W2065120607","https://openalex.org/W2067224723","https://openalex.org/W2070111044","https://openalex.org/W2080825872","https://openalex.org/W2086839192","https://openalex.org/W2088465583","https://openalex.org/W2099647435","https://openalex.org/W2101966879","https://openalex.org/W2102763958","https://openalex.org/W2115314588","https://openalex.org/W2117330264","https://openalex.org/W2124429966","https://openalex.org/W2131254145","https://openalex.org/W2132814595","https://openalex.org/W2138099459","https://openalex.org/W2140000007","https://openalex.org/W2140475081","https://openalex.org/W2144558399","https://openalex.org/W2152428313","https://openalex.org/W2156408184","https://openalex.org/W2159308186","https://openalex.org/W2160055399","https://openalex.org/W2160457997","https://openalex.org/W2165091034","https://openalex.org/W2170587459","https://openalex.org/W2170939617","https://openalex.org/W2592221892","https://openalex.org/W4232809066"],"related_works":["https://openalex.org/W4235454973","https://openalex.org/W4239401071","https://openalex.org/W2067224723","https://openalex.org/W2898734073","https://openalex.org/W2953708011","https://openalex.org/W2250058922","https://openalex.org/W2965410099","https://openalex.org/W2378560880","https://openalex.org/W4250319866","https://openalex.org/W2007578917"],"abstract_inverted_index":{"Power":[0],"integrity":[1],"has":[2],"become":[3],"increasingly":[4],"important":[5],"for":[6,104,117],"sub-32nm":[7,118],"designs.":[8],"Many":[9],"prior":[10],"works":[11],"have":[12,42,89,129],"discussed":[13],"power":[14,79,107,125,136],"grid":[15,80,108],"design":[16,24,48,61,81,103],"and":[17,29,69,97,124,138],"optimization":[18],"in":[19],"the":[20,34,47,60],"post-layout":[21],"stage,":[22],"when":[23,59],"change":[25],"is":[26,63],"inevitably":[27],"expensive":[28],"difficult.":[30],"In":[31],"contrast,":[32],"during":[33],"early":[35,57,145],"stage":[36,58],"of":[37,77],"a":[38,101],"development":[39],"cycle,":[40],"designers":[41],"more":[43,130],"flexibility":[44],"to":[45,84,100,140],"improve":[46],"quality.":[49],"However,":[50],"there":[51],"are":[52],"several":[53],"fundamental":[54,75],"challenges":[55],"at":[56,144],"database":[62],"not":[64],"complete,":[65],"including":[66],"extraction,":[67],"modeling,":[68],"optimization.":[70],"This":[71],"article":[72],"tackles":[73],"these":[74],"issues":[76],"early-stage":[78,106],"from":[82,112],"architecture":[83],"layout.":[85],"The":[86,110],"proposed":[87],"methods":[88],"been":[90],"silicon":[91],"validated":[92],"on":[93,135],"32nm":[94],"on-market":[95],"chips":[96],"successfully":[98],"applied":[99],"22nm":[102],"its":[105],"design.":[109],"findings":[111],"such":[113],"practices":[114],"reveal":[115],"that,":[116],"chips,":[119],"an":[120],"intrinsic":[121],"on-die":[122],"capacitance":[123],"gate":[126],"scheme":[127],"may":[128],"significant":[131],"impact":[132],"than":[133],"expected":[134],"integrity,":[137],"needs":[139],"be":[141],"well":[142],"addressed":[143],"stage.":[146]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":4}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}