{"id":"https://openalex.org/W2092213324","doi":"https://doi.org/10.1145/2700082","title":"Finite-State-Machine Overlay Architectures for Fast FPGA Compilation and Application Portability","display_name":"Finite-State-Machine Overlay Architectures for Fast FPGA Compilation and Application Portability","publication_year":2015,"publication_date":"2015-04-21","ids":{"openalex":"https://openalex.org/W2092213324","doi":"https://doi.org/10.1145/2700082","mag":"2092213324"},"language":"en","primary_location":{"id":"doi:10.1145/2700082","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2700082","pdf_url":null,"source":{"id":"https://openalex.org/S136160450","display_name":"ACM Transactions on Embedded Computing Systems","issn_l":"1539-9087","issn":["1539-9087","1558-3465"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Embedded Computing Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5008939745","display_name":"Patrick Cooke","orcid":null},"institutions":[{"id":"https://openalex.org/I33213144","display_name":"University of Florida","ror":"https://ror.org/02y3ad647","country_code":"US","type":"education","lineage":["https://openalex.org/I33213144"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Patrick Cooke","raw_affiliation_strings":["University of Florida, Gainesville, FL"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Florida, Gainesville, FL","institution_ids":["https://openalex.org/I33213144"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102073311","display_name":"L\u00fc Hao","orcid":null},"institutions":[{"id":"https://openalex.org/I33213144","display_name":"University of Florida","ror":"https://ror.org/02y3ad647","country_code":"US","type":"education","lineage":["https://openalex.org/I33213144"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Lu Hao","raw_affiliation_strings":["University of Florida, Gainesville, FL"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Florida, Gainesville, FL","institution_ids":["https://openalex.org/I33213144"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5088031457","display_name":"Greg Stitt","orcid":"https://orcid.org/0000-0001-7159-7439"},"institutions":[{"id":"https://openalex.org/I33213144","display_name":"University of Florida","ror":"https://ror.org/02y3ad647","country_code":"US","type":"education","lineage":["https://openalex.org/I33213144"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Greg Stitt","raw_affiliation_strings":["University of Florida, Gainesville, FL"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Florida, Gainesville, FL","institution_ids":["https://openalex.org/I33213144"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5008939745"],"corresponding_institution_ids":["https://openalex.org/I33213144"],"apc_list":null,"apc_paid":null,"fwci":1.6469,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.84012783,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"14","issue":"3","first_page":"1","last_page":"25"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/software-portability","display_name":"Software portability","score":0.8998236656188965},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8841869831085205},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7514225244522095},{"id":"https://openalex.org/keywords/overlay","display_name":"Overlay","score":0.7055808305740356},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.6512671709060669},{"id":"https://openalex.org/keywords/finite-state-machine","display_name":"Finite-state machine","score":0.582245409488678},{"id":"https://openalex.org/keywords/state","display_name":"State (computer science)","score":0.5187592506408691},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.512237012386322},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.49540674686431885},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.42404812574386597},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1654670238494873},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.07267811894416809}],"concepts":[{"id":"https://openalex.org/C63000827","wikidata":"https://www.wikidata.org/wiki/Q3080428","display_name":"Software portability","level":2,"score":0.8998236656188965},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8841869831085205},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7514225244522095},{"id":"https://openalex.org/C136085584","wikidata":"https://www.wikidata.org/wiki/Q910289","display_name":"Overlay","level":2,"score":0.7055808305740356},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.6512671709060669},{"id":"https://openalex.org/C167822520","wikidata":"https://www.wikidata.org/wiki/Q176452","display_name":"Finite-state machine","level":2,"score":0.582245409488678},{"id":"https://openalex.org/C48103436","wikidata":"https://www.wikidata.org/wiki/Q599031","display_name":"State (computer science)","level":2,"score":0.5187592506408691},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.512237012386322},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.49540674686431885},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.42404812574386597},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1654670238494873},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.07267811894416809}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2700082","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2700082","pdf_url":null,"source":{"id":"https://openalex.org/S136160450","display_name":"ACM Transactions on Embedded Computing Systems","issn_l":"1539-9087","issn":["1539-9087","1558-3465"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Embedded Computing Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.4099999964237213,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":34,"referenced_works":["https://openalex.org/W53344100","https://openalex.org/W1549080799","https://openalex.org/W1704440991","https://openalex.org/W1982157141","https://openalex.org/W1992336996","https://openalex.org/W1996501408","https://openalex.org/W2000036939","https://openalex.org/W2017650358","https://openalex.org/W2027103958","https://openalex.org/W2034601083","https://openalex.org/W2048076817","https://openalex.org/W2082061787","https://openalex.org/W2082909013","https://openalex.org/W2091249520","https://openalex.org/W2102182691","https://openalex.org/W2106157873","https://openalex.org/W2116759740","https://openalex.org/W2116820704","https://openalex.org/W2124828452","https://openalex.org/W2136778154","https://openalex.org/W2143714984","https://openalex.org/W2143738350","https://openalex.org/W2147903032","https://openalex.org/W2148089006","https://openalex.org/W2150022482","https://openalex.org/W2154991996","https://openalex.org/W2158068912","https://openalex.org/W2159167597","https://openalex.org/W2161761794","https://openalex.org/W2167711864","https://openalex.org/W2170116489","https://openalex.org/W2554510265","https://openalex.org/W4251353974","https://openalex.org/W4253334770"],"related_works":["https://openalex.org/W107105315","https://openalex.org/W4367156293","https://openalex.org/W1584537303","https://openalex.org/W4388155270","https://openalex.org/W1872724644","https://openalex.org/W2750549761","https://openalex.org/W28826848","https://openalex.org/W2122272819","https://openalex.org/W2130894091","https://openalex.org/W2914607376"],"abstract_inverted_index":{"Despite":[0],"significant":[1],"advantages,":[2],"wider":[3],"usage":[4],"of":[5,19,68,92],"field-programmable":[6],"gate":[7],"arrays":[8],"(FPGAs)":[9],"has":[10],"been":[11],"limited":[12],"by":[13,45],"lengthy":[14],"compilation":[15,66],"and":[16,88],"a":[17,72],"lack":[18],"portability.":[20],"Virtual-architecture":[21],"overlays":[22],"have":[23],"partially":[24],"addressed":[25],"these":[26],"problems,":[27],"but":[28],"previous":[29,43],"work":[30,44],"focuses":[31],"mainly":[32],"on":[33],"heavily":[34],"pipelined":[35],"applications":[36],"with":[37,84],"minimal":[38],"control":[39,49,69],"requirements.":[40],"We":[41],"expand":[42],"enabling":[46],"more":[47],"flexible":[48],"via":[50],"overlay":[51],"architectures":[52,64],"for":[53,59],"finite-state":[54],"machines.":[55],"Although":[56],"not":[57],"appropriate":[58],"control-intensive":[60],"circuits,":[61],"the":[62],"presented":[63],"reduced":[65],"times":[67],"changes":[70],"in":[71],"convolution":[73],"case":[74],"study":[75],"from":[76],"7":[77],"hours":[78],"to":[79],"less":[80],"than":[81],"1":[82],"second,":[83],"no":[85],"performance":[86],"overhead":[87,91],"an":[89],"area":[90],"0.2%.":[93]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":3},{"year":2015,"cited_by_count":1}],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}
