{"id":"https://openalex.org/W2043899666","doi":"https://doi.org/10.1145/2684746.2721403","title":"Unlocking FPGAs Using High Level Synthesis Compiler Technologies","display_name":"Unlocking FPGAs Using High Level Synthesis Compiler Technologies","publication_year":2015,"publication_date":"2015-02-10","ids":{"openalex":"https://openalex.org/W2043899666","doi":"https://doi.org/10.1145/2684746.2721403","mag":"2043899666"},"language":"en","primary_location":{"id":"doi:10.1145/2684746.2721403","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2684746.2721403","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5089528766","display_name":"Fernando Martinez Vallina","orcid":null},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Fernando Martinez Vallina","raw_affiliation_strings":["Xilinx, San Jose, CA, USA"],"affiliations":[{"raw_affiliation_string":"Xilinx, San Jose, CA, USA","institution_ids":["https://openalex.org/I32923980"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5041588521","display_name":"Henry Styles","orcid":null},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Henry Styles","raw_affiliation_strings":["Xilinx, San Jose, CA, USA"],"affiliations":[{"raw_affiliation_string":"Xilinx, San Jose, CA, USA","institution_ids":["https://openalex.org/I32923980"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5089528766"],"corresponding_institution_ids":["https://openalex.org/I32923980"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.07479499,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"27","last_page":"27"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9847999811172485,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8623026609420776},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7907226085662842},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.7525573968887329},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5342183709144592},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.4998610019683838},{"id":"https://openalex.org/keywords/leverage","display_name":"Leverage (statistics)","score":0.4849581718444824},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4651654064655304},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.44386619329452515},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.37465953826904297},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.160739004611969}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8623026609420776},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7907226085662842},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.7525573968887329},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5342183709144592},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.4998610019683838},{"id":"https://openalex.org/C153083717","wikidata":"https://www.wikidata.org/wiki/Q6535263","display_name":"Leverage (statistics)","level":2,"score":0.4849581718444824},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4651654064655304},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.44386619329452515},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.37465953826904297},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.160739004611969},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2684746.2721403","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2684746.2721403","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.4699999988079071}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2427933582","https://openalex.org/W2612099726","https://openalex.org/W2531450434","https://openalex.org/W1967938402","https://openalex.org/W2386041993","https://openalex.org/W1608572506","https://openalex.org/W2160632767","https://openalex.org/W2135482679","https://openalex.org/W2035070505","https://openalex.org/W2000188956"],"abstract_inverted_index":{"FPGA":[0,23,40,94,144],"devices":[1],"have":[2],"long":[3],"been":[4],"the":[5,18,27,72,78,84,101,140,143,147],"standard":[6],"for":[7,55],"massively":[8],"parallel":[9,153],"computing":[10],"fabrics":[11],"with":[12,21],"a":[13,50],"low":[14],"power":[15],"footprint.":[16],"Unfortunately,":[17],"complexity":[19],"associated":[20],"an":[22,117],"design":[24,122,129],"has":[25],"limited":[26],"rate":[28],"of":[29,53,71,74,86,126,142],"adoption":[30,52],"by":[31],"software":[32,132],"application":[33,136],"programmers.":[34],"Recent":[35],"advances":[36],"in":[37,64,89,116,151],"compiler":[38,103],"and":[39,47,91,109],"fabric":[41,145],"capabilities":[42],"are":[43,113],"reversing":[44],"this":[45,75],"trend":[46],"there":[48],"is":[49,77],"growing":[51],"FPGAs":[54],"algorithmic":[56],"workloads":[57],"such":[58,155],"as":[59,156],"data":[60],"analytics,":[61],"feature":[62],"detection":[63],"images,":[65],"adaptive":[66],"beam":[67],"forming,":[68],"etc.":[69],"One":[70],"pillars":[73],"shift":[76],"Vivado":[79],"HLS":[80,102],"compiler,":[81],"which":[82],"enables":[83],"compilation":[85],"algorithms":[87],"captured":[88],"C":[90],"C++into":[92],"efficient":[93],"implementations.":[95],"This":[96],"talk":[97],"focuses":[98],"on":[99],"how":[100,110],"creates":[104],"algorithm":[105],"specific":[106],"compute":[107],"architectures":[108,154],"these":[111,127],"elements":[112],"then":[114],"used":[115],"OpenCL":[118],"based":[119],"system":[120],"level":[121],"abstraction.":[123],"The":[124],"evolution":[125],"hardware":[128],"abstractions":[130],"into":[131],"centric":[133],"specifications":[134],"enable":[135],"developers":[137],"to":[138],"leverage":[139],"flexibility":[141],"without":[146],"constraints":[148],"typically":[149],"found":[150],"fixed":[152],"multi-core":[157],"CPUs/GPUs.":[158]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}