{"id":"https://openalex.org/W1969720574","doi":"https://doi.org/10.1145/2684746.2689062","title":"Impact of Memory Architecture on FPGA Energy Consumption","display_name":"Impact of Memory Architecture on FPGA Energy Consumption","publication_year":2015,"publication_date":"2015-02-10","ids":{"openalex":"https://openalex.org/W1969720574","doi":"https://doi.org/10.1145/2684746.2689062","mag":"1969720574"},"language":"en","primary_location":{"id":"doi:10.1145/2684746.2689062","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2684746.2689062","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5067672958","display_name":"Edin Kadri\u0107","orcid":"https://orcid.org/0000-0002-5067-5538"},"institutions":[{"id":"https://openalex.org/I79576946","display_name":"University of Pennsylvania","ror":"https://ror.org/00b30xv10","country_code":"US","type":"education","lineage":["https://openalex.org/I79576946"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Edin Kadric","raw_affiliation_strings":["University of Pennsylvania, Philadelphia, PA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Pennsylvania, Philadelphia, PA, USA","institution_ids":["https://openalex.org/I79576946"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5069336315","display_name":"David Lakata","orcid":null},"institutions":[{"id":"https://openalex.org/I79576946","display_name":"University of Pennsylvania","ror":"https://ror.org/00b30xv10","country_code":"US","type":"education","lineage":["https://openalex.org/I79576946"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"David Lakata","raw_affiliation_strings":["University of Pennsylvania, Philadelphia, PA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Pennsylvania, Philadelphia, PA, USA","institution_ids":["https://openalex.org/I79576946"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5087585086","display_name":"Andr\u00e9 DeHon","orcid":"https://orcid.org/0000-0001-9177-7699"},"institutions":[{"id":"https://openalex.org/I79576946","display_name":"University of Pennsylvania","ror":"https://ror.org/00b30xv10","country_code":"US","type":"education","lineage":["https://openalex.org/I79576946"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Andr\u00e9 DeHon","raw_affiliation_strings":["University of Pennsylvania, Philadelphia, PA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Pennsylvania, Philadelphia, PA, USA","institution_ids":["https://openalex.org/I79576946"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I79576946"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":24,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"146","last_page":"155"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8284504413604736},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6021721363067627},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5912812352180481},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5658472776412964},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.5264794826507568},{"id":"https://openalex.org/keywords/memory-architecture","display_name":"Memory architecture","score":0.5248396992683411},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5218414664268494},{"id":"https://openalex.org/keywords/energy-consumption","display_name":"Energy consumption","score":0.5203654170036316},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.48715612292289734},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.44745203852653503},{"id":"https://openalex.org/keywords/computing-with-memory","display_name":"Computing with Memory","score":0.43739867210388184},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4142250716686249},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.36156153678894043},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3598686456680298},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.12850013375282288},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.07671806216239929}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8284504413604736},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6021721363067627},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5912812352180481},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5658472776412964},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.5264794826507568},{"id":"https://openalex.org/C2779602883","wikidata":"https://www.wikidata.org/wiki/Q15544750","display_name":"Memory architecture","level":2,"score":0.5248396992683411},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5218414664268494},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.5203654170036316},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.48715612292289734},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.44745203852653503},{"id":"https://openalex.org/C152890283","wikidata":"https://www.wikidata.org/wiki/Q4129922","display_name":"Computing with Memory","level":5,"score":0.43739867210388184},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4142250716686249},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.36156153678894043},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3598686456680298},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.12850013375282288},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.07671806216239929},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2684746.2689062","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2684746.2689062","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8999999761581421,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[{"id":"https://openalex.org/G8972477892","display_name":null,"funder_award_id":"HR0011-13-C-0005","funder_id":"https://openalex.org/F4320332180","funder_display_name":"Defense Advanced Research Projects Agency"}],"funders":[{"id":"https://openalex.org/F4320332180","display_name":"Defense Advanced Research Projects Agency","ror":"https://ror.org/02caytj08"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1523051745","https://openalex.org/W1967128905","https://openalex.org/W1977850862","https://openalex.org/W1993410355","https://openalex.org/W2005602803","https://openalex.org/W2008694370","https://openalex.org/W2016889342","https://openalex.org/W2023146792","https://openalex.org/W2072974923","https://openalex.org/W2095558812","https://openalex.org/W2104298702","https://openalex.org/W2128473621","https://openalex.org/W2138289583","https://openalex.org/W2138383740","https://openalex.org/W2155316178","https://openalex.org/W2464177207","https://openalex.org/W6631410163"],"related_works":["https://openalex.org/W3180803030","https://openalex.org/W1575240748","https://openalex.org/W3025845664","https://openalex.org/W2993507867","https://openalex.org/W2079019992","https://openalex.org/W4312264564","https://openalex.org/W2561005478","https://openalex.org/W2024155916","https://openalex.org/W1970751325","https://openalex.org/W2036525499"],"abstract_inverted_index":{"FPGAs":[0],"have":[1,128],"the":[2,28,31,34,40,66,76,83,143,146,163,171],"advantage":[3],"that":[4,45,65,95,159],"a":[5,19,71,80,88,106,129],"single":[6],"component":[7],"can":[8,63,141,161],"be":[9],"configured":[10],"post-fabrication":[11],"to":[12,119,148],"implement":[13],"almost":[14],"any":[15],"computation.":[16],"However,":[17],"designing":[18],"one-size-fits-all":[20],"memory":[21,35,51,56,61,103],"architecture":[22,52,97],"causes":[23],"an":[24,46,96],"inherent":[25],"mismatch":[26],"between":[27,60],"needs":[29],"of":[30,73,75,82,90],"application":[32],"and":[33,37,58,87,101,121],"sizes":[36],"placement":[38],"on":[39,137],"architecture.":[41,78],"Nonetheless,":[42],"we":[43,93,140,157,160],"show":[44,94,158],"energy-balanced":[47],"design":[48],"for":[49,170],"FPGA":[50],"(memory":[53],"block":[54],"size(s),":[55],"banking,":[57],"spacing":[59],"banks)":[62],"guarantee":[64],"energy":[67,109,132,150,164],"is":[68],"always":[69],"within":[70],"factor":[72],"2":[74],"optimally-matched":[77],"On":[79],"combination":[81],"VTR":[84],"7":[85],"benchmarks":[86,138],"set":[89],"tunable":[91],"benchmarks,":[92],"with":[98],"internally-banked":[99],"8Kb":[100],"256Kb":[102],"blocks":[104],"has":[105],"31%":[107],"worst-case":[108,131],"overhead":[110,133,165],"(8%":[111],"geomean).":[112,135,172],"In":[113],"contrast,":[114],"monolithic":[115],"16Kb":[116],"memories":[117,123],"(comparable":[118],"18Kb":[120],"20Kb":[122],"used":[124],"in":[125,145],"commercial":[126],"FPGAs)":[127],"147%":[130],"(24%":[134],"Furthermore,":[136],"where":[139],"tune":[142],"parallelism":[144],"implementation":[147],"improve":[149],"(FFT,":[151],"Matrix-Multiply,":[152],"GMM,":[153],"Sort,":[154],"Window":[155],"Filter),":[156],"reduce":[162],"by":[166],"another":[167],"13%":[168],"(25%":[169]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":4},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":9},{"year":2015,"cited_by_count":2}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
