{"id":"https://openalex.org/W2051462885","doi":"https://doi.org/10.1145/2665066","title":"Accurate Leakage/Delay Estimation for FinFET Standard Cells under PVT Variations using the Response Surface Methodology","display_name":"Accurate Leakage/Delay Estimation for FinFET Standard Cells under PVT Variations using the Response Surface Methodology","publication_year":2014,"publication_date":"2014-11-18","ids":{"openalex":"https://openalex.org/W2051462885","doi":"https://doi.org/10.1145/2665066","mag":"2051462885"},"language":"en","primary_location":{"id":"doi:10.1145/2665066","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2665066","pdf_url":null,"source":{"id":"https://openalex.org/S96198239","display_name":"ACM Journal on Emerging Technologies in Computing Systems","issn_l":"1550-4832","issn":["1550-4832","1550-4840"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Journal on Emerging Technologies in Computing Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5022970374","display_name":"Sourindra Chaudhuri","orcid":null},"institutions":[{"id":"https://openalex.org/I20089843","display_name":"Princeton University","ror":"https://ror.org/00hx57361","country_code":"US","type":"education","lineage":["https://openalex.org/I20089843"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sourindra M. Chaudhuri","raw_affiliation_strings":["Princeton University, Princeton, NJ"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Princeton University, Princeton, NJ","institution_ids":["https://openalex.org/I20089843"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5000714311","display_name":"Prateek Mishra","orcid":"https://orcid.org/0000-0003-1276-1678"},"institutions":[{"id":"https://openalex.org/I20089843","display_name":"Princeton University","ror":"https://ror.org/00hx57361","country_code":"US","type":"education","lineage":["https://openalex.org/I20089843"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Prateek Mishra","raw_affiliation_strings":["Princeton University, Princeton, NJ"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Princeton University, Princeton, NJ","institution_ids":["https://openalex.org/I20089843"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5086131079","display_name":"Niraj K. Jha","orcid":"https://orcid.org/0000-0002-1539-0369"},"institutions":[{"id":"https://openalex.org/I20089843","display_name":"Princeton University","ror":"https://ror.org/00hx57361","country_code":"US","type":"education","lineage":["https://openalex.org/I20089843"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Niraj K. Jha","raw_affiliation_strings":["Princeton University, Princeton, NJ"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Princeton University, Princeton, NJ","institution_ids":["https://openalex.org/I20089843"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I20089843"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.10327412,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"11","issue":"2","first_page":"1","last_page":"20"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.6777706742286682},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.595224916934967},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.570362389087677},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5272116661071777},{"id":"https://openalex.org/keywords/delay-calculation","display_name":"Delay calculation","score":0.5057365894317627},{"id":"https://openalex.org/keywords/node","display_name":"Node (physics)","score":0.5050845742225647},{"id":"https://openalex.org/keywords/technology-cad","display_name":"Technology CAD","score":0.4948682188987732},{"id":"https://openalex.org/keywords/propagation-delay","display_name":"Propagation delay","score":0.4401383697986603},{"id":"https://openalex.org/keywords/threshold-voltage","display_name":"Threshold voltage","score":0.43662017583847046},{"id":"https://openalex.org/keywords/gate-oxide","display_name":"Gate oxide","score":0.4241126477718353},{"id":"https://openalex.org/keywords/mosfet","display_name":"MOSFET","score":0.42247554659843445},{"id":"https://openalex.org/keywords/and-gate","display_name":"AND gate","score":0.414090633392334},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.3757033348083496},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3570566177368164},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.3398391902446747},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3018116354942322},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3011332154273987}],"concepts":[{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.6777706742286682},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.595224916934967},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.570362389087677},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5272116661071777},{"id":"https://openalex.org/C174086752","wikidata":"https://www.wikidata.org/wiki/Q5253471","display_name":"Delay calculation","level":3,"score":0.5057365894317627},{"id":"https://openalex.org/C62611344","wikidata":"https://www.wikidata.org/wiki/Q1062658","display_name":"Node (physics)","level":2,"score":0.5050845742225647},{"id":"https://openalex.org/C34929307","wikidata":"https://www.wikidata.org/wiki/Q845636","display_name":"Technology CAD","level":3,"score":0.4948682188987732},{"id":"https://openalex.org/C90806461","wikidata":"https://www.wikidata.org/wiki/Q1144416","display_name":"Propagation delay","level":2,"score":0.4401383697986603},{"id":"https://openalex.org/C195370968","wikidata":"https://www.wikidata.org/wiki/Q1754002","display_name":"Threshold voltage","level":4,"score":0.43662017583847046},{"id":"https://openalex.org/C2361726","wikidata":"https://www.wikidata.org/wiki/Q5527031","display_name":"Gate oxide","level":4,"score":0.4241126477718353},{"id":"https://openalex.org/C2778413303","wikidata":"https://www.wikidata.org/wiki/Q210793","display_name":"MOSFET","level":4,"score":0.42247554659843445},{"id":"https://openalex.org/C10418432","wikidata":"https://www.wikidata.org/wiki/Q560370","display_name":"AND gate","level":3,"score":0.414090633392334},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.3757033348083496},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3570566177368164},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3398391902446747},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3018116354942322},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3011332154273987},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C194789388","wikidata":"https://www.wikidata.org/wiki/Q17855283","display_name":"CAD","level":2,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C199639397","wikidata":"https://www.wikidata.org/wiki/Q1788588","display_name":"Engineering drawing","level":1,"score":0.0},{"id":"https://openalex.org/C66938386","wikidata":"https://www.wikidata.org/wiki/Q633538","display_name":"Structural engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2665066","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2665066","pdf_url":null,"source":{"id":"https://openalex.org/S96198239","display_name":"ACM Journal on Emerging Technologies in Computing Systems","issn_l":"1550-4832","issn":["1550-4832","1550-4840"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Journal on Emerging Technologies in Computing Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5600000023841858,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320306087","display_name":"Semiconductor Research Corporation","ror":"https://ror.org/047z4n946"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":28,"referenced_works":["https://openalex.org/W1489111899","https://openalex.org/W1559796829","https://openalex.org/W1971143063","https://openalex.org/W2023804273","https://openalex.org/W2035130574","https://openalex.org/W2049539158","https://openalex.org/W2059802705","https://openalex.org/W2093855145","https://openalex.org/W2105874609","https://openalex.org/W2106542123","https://openalex.org/W2106759508","https://openalex.org/W2107317103","https://openalex.org/W2109596500","https://openalex.org/W2114978747","https://openalex.org/W2117865974","https://openalex.org/W2142449924","https://openalex.org/W2143166145","https://openalex.org/W2150368362","https://openalex.org/W2151356034","https://openalex.org/W2153299515","https://openalex.org/W2153865810","https://openalex.org/W2159850878","https://openalex.org/W2160580687","https://openalex.org/W2162018037","https://openalex.org/W2172215492","https://openalex.org/W4229800208","https://openalex.org/W4230486495","https://openalex.org/W4242472899"],"related_works":["https://openalex.org/W3015599398","https://openalex.org/W2188730438","https://openalex.org/W2157230896","https://openalex.org/W2792778858","https://openalex.org/W2034656493","https://openalex.org/W2362904186","https://openalex.org/W2114232017","https://openalex.org/W1997308464","https://openalex.org/W2040679505","https://openalex.org/W1927636319"],"abstract_inverted_index":{"Among":[0],"different":[1,231,286],"multi-gate":[2,53],"transistors,":[3,54],"FinFETs":[4,242],"and":[5,23,35,42,63,71,103,142,227,233,239,250],"Trigate":[6],"FETs":[7],"have":[8,186],"set":[9],"themselves":[10],"apart":[11],"as":[12],"the":[13,18,50,100,110,148,155,206,244,255,271,298],"most":[14],"promising":[15],"candidates":[16],"for":[17,163,230,285],"upcoming":[19],"22nm":[20,245],"technology":[21,246],"node":[22],"beyond":[24],"owing":[25],"to":[26,48,77,98,159,189],"their":[27],"superior":[28],"device":[29,177,182,192,196],"performance,":[30],"lower":[31],"leakage":[32,62,101,226,249],"power":[33,51],"consumption,":[34],"cost-effective":[36],"fabrication":[37],"process.":[38],"Innovative":[39],"circuit":[40,79],"design":[41,90],"optimization":[43],"techniques":[44],"will":[45,58],"be":[46],"required":[47],"harness":[49],"of":[52,66,105,112,150,166,179,194,209,216,273,281],"which":[55],"in":[56,75,114,221,259,297],"turn":[57],"depend":[59],"on":[60,93],"accurate":[61,83],"timing":[64],"characterization":[65],"these":[67,172],"devices":[68],"under":[69,109],"spatial":[70],"environmental":[72],"variations.":[73],"Hence,":[74],"order":[76],"aid":[78],"designers,":[80],"we":[81,174],"present":[82,224],"analytical":[84,161,225,256],"models":[85,162,229,257],"using":[86],"central":[87],"composite":[88],"rotatable":[89],"(CCRD)":[91],"based":[92],"response":[94],"surface":[95],"methodology":[96],"(RSM)":[97],"estimate":[99],"current":[102],"delay":[104,228,251],"FinFET":[106,167],"standard":[107],"cells":[108],"effect":[111],"variations":[113],"gate":[115],"length":[116],"(":[117,123,138,144],"L":[118],"G":[119,134],"),":[120,126,131,135,141],"fin":[121],"thickness":[122,128],"T":[124,145],"SI":[125],"gate-oxide":[127],"(T":[129],"OX":[130],"gate-workfunction":[132],"(\u03a6":[133],"supply":[136],"voltage":[137],"V":[139],"DD":[140],"temperature":[143],").":[146],"To":[147,170],"best":[149],"our":[151,210],"knowledge,":[152],"this":[153],"is":[154],"first":[156],"such":[157],"attempt":[158],"develop":[160],"leakage/delay":[164],"estimation":[165],"logic":[168,234,288],"gates.":[169],"derive":[171],"models,":[173],"employ":[175],"TCAD":[176,191],"simulations":[178,193,269],"adjusted":[180],"2D":[181],"cross":[183],"sections":[184],"that":[185],"been":[187],"shown":[188],"track":[190,270],"3D":[195],"behavior":[197],"within":[198],"a":[199,291],"1--3%":[200],"error":[201,295],"range.":[202,300],"This":[203],"drastically":[204],"reduces":[205],"CPU":[207],"time":[208],"modeling":[211],"technique":[212],"(by":[213],"several":[214,279],"orders":[215,280],"magnitude)":[217],"without":[218],"much":[219],"loss":[220],"accuracy.":[222],"We":[223],"sizes":[232],"styles":[235],"(e.g.,":[236],"shorted-gate":[237],"(SG)":[238],"independent-gate":[240],"(IG)":[241],"at":[243],"node).":[247],"Both":[248],"estimates":[252],"derived":[253],"from":[254],"are":[258,278],"close":[260],"agreement":[261],"with":[262,290],"quasi-Monte":[263],"Carlo":[264,275],"(QMC)":[265],"simulation":[266],"results":[267],"(QMC":[268],"accuracy":[272],"Monte":[274],"simulations,":[276],"but":[277],"magnitude":[282],"faster)":[283],"obtained":[284],"adjusted-2D":[287],"gates":[289],"root":[292],"mean":[293],"square":[294],"(RMSE)":[296],"0.23%--5.87%":[299]},"counts_by_year":[{"year":2022,"cited_by_count":1}],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}
