{"id":"https://openalex.org/W2122194727","doi":"https://doi.org/10.1145/2660540.2661014","title":"Adaptive Shared Memory Control for Multimedia Systems-on-Chip","display_name":"Adaptive Shared Memory Control for Multimedia Systems-on-Chip","publication_year":2014,"publication_date":"2014-09-01","ids":{"openalex":"https://openalex.org/W2122194727","doi":"https://doi.org/10.1145/2660540.2661014","mag":"2122194727"},"language":"en","primary_location":{"id":"doi:10.1145/2660540.2661014","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2660540.2661014","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 27th Symposium on Integrated Circuits and Systems Design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5003777072","display_name":"Alexsandro Crist\u00f3v\u00e3o Bonatto","orcid":"https://orcid.org/0000-0001-9704-6491"},"institutions":[{"id":"https://openalex.org/I2801049591","display_name":"Instituto Federal de Educa\u00e7\u00e3o, Ci\u00eancia e Tecnologia do Rio Grande do Sul","ror":"https://ror.org/008p1v134","country_code":"BR","type":"education","lineage":["https://openalex.org/I1293487690","https://openalex.org/I2801049591","https://openalex.org/I2801200668"]}],"countries":["BR"],"is_corresponding":true,"raw_author_name":"Alexsandro C. Bonatto","raw_affiliation_strings":["IFRS -- Federal Institute of Rio Grande do Sul, Porto Alegre, Brazil 91791-508","IFRS -- Federal Institute of Rio Grande do Sul, Porto Alegre, Brazil 91791-508#TAB#"],"affiliations":[{"raw_affiliation_string":"IFRS -- Federal Institute of Rio Grande do Sul, Porto Alegre, Brazil 91791-508","institution_ids":["https://openalex.org/I2801049591"]},{"raw_affiliation_string":"IFRS -- Federal Institute of Rio Grande do Sul, Porto Alegre, Brazil 91791-508#TAB#","institution_ids":["https://openalex.org/I2801049591"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021582515","display_name":"Marcelo Negreiros","orcid":"https://orcid.org/0000-0002-8525-6229"},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Marcelo Negreiros","raw_affiliation_strings":["UFRGS -- Federal University of Rio Grande do Sul, Porto Alegre, Brazil 90035-190","UFRGS -- Federal University of Rio Grande do Sul, Porto Alegre, Brazil 90035-190#TAB#"],"affiliations":[{"raw_affiliation_string":"UFRGS -- Federal University of Rio Grande do Sul, Porto Alegre, Brazil 90035-190","institution_ids":["https://openalex.org/I130442723"]},{"raw_affiliation_string":"UFRGS -- Federal University of Rio Grande do Sul, Porto Alegre, Brazil 90035-190#TAB#","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007482738","display_name":"Fabio Irigon Pereira","orcid":"https://orcid.org/0000-0001-8190-9221"},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"F\u00e1bio I. Pereira","raw_affiliation_strings":["UFRGS -- Federal University of Rio Grande do Sul, Porto Alegre, Brazil 90035-190","UFRGS -- Federal University of Rio Grande do Sul, Porto Alegre, Brazil 90035-190#TAB#"],"affiliations":[{"raw_affiliation_string":"UFRGS -- Federal University of Rio Grande do Sul, Porto Alegre, Brazil 90035-190","institution_ids":["https://openalex.org/I130442723"]},{"raw_affiliation_string":"UFRGS -- Federal University of Rio Grande do Sul, Porto Alegre, Brazil 90035-190#TAB#","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110083216","display_name":"Andr\u00e9 Borin Soares","orcid":null},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Andr\u00e9 B. Soares","raw_affiliation_strings":["UFRGS -- Federal University of Rio Grande do Sul, Porto Alegre, Brazil 90035-190","UFRGS -- Federal University of Rio Grande do Sul, Porto Alegre, Brazil 90035-190#TAB#"],"affiliations":[{"raw_affiliation_string":"UFRGS -- Federal University of Rio Grande do Sul, Porto Alegre, Brazil 90035-190","institution_ids":["https://openalex.org/I130442723"]},{"raw_affiliation_string":"UFRGS -- Federal University of Rio Grande do Sul, Porto Alegre, Brazil 90035-190#TAB#","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5043190662","display_name":"Altamiro Susin","orcid":"https://orcid.org/0000-0001-7034-5336"},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Altamiro A. Susin","raw_affiliation_strings":["UFRGS -- Federal University of Rio Grande do Sul, Porto Alegre, Brazil 90035-190","UFRGS -- Federal University of Rio Grande do Sul, Porto Alegre, Brazil 90035-190#TAB#"],"affiliations":[{"raw_affiliation_string":"UFRGS -- Federal University of Rio Grande do Sul, Porto Alegre, Brazil 90035-190","institution_ids":["https://openalex.org/I130442723"]},{"raw_affiliation_string":"UFRGS -- Federal University of Rio Grande do Sul, Porto Alegre, Brazil 90035-190#TAB#","institution_ids":["https://openalex.org/I130442723"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5003777072"],"corresponding_institution_ids":["https://openalex.org/I2801049591"],"apc_list":null,"apc_paid":null,"fwci":0.3448,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.67699454,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"7"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/arbiter","display_name":"Arbiter","score":0.8924168348312378},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8598405122756958},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.6192145347595215},{"id":"https://openalex.org/keywords/bottleneck","display_name":"Bottleneck","score":0.6032963395118713},{"id":"https://openalex.org/keywords/flat-memory-model","display_name":"Flat memory model","score":0.5450336337089539},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.501530647277832},{"id":"https://openalex.org/keywords/extended-memory","display_name":"Extended memory","score":0.4114413261413574},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4067768454551697},{"id":"https://openalex.org/keywords/registered-memory","display_name":"Registered memory","score":0.3711012601852417},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.34648191928863525},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.31460368633270264},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.18041333556175232}],"concepts":[{"id":"https://openalex.org/C2779971761","wikidata":"https://www.wikidata.org/wiki/Q629872","display_name":"Arbiter","level":2,"score":0.8924168348312378},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8598405122756958},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.6192145347595215},{"id":"https://openalex.org/C2780513914","wikidata":"https://www.wikidata.org/wiki/Q18210350","display_name":"Bottleneck","level":2,"score":0.6032963395118713},{"id":"https://openalex.org/C57863822","wikidata":"https://www.wikidata.org/wiki/Q905488","display_name":"Flat memory model","level":4,"score":0.5450336337089539},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.501530647277832},{"id":"https://openalex.org/C171675096","wikidata":"https://www.wikidata.org/wiki/Q1143380","display_name":"Extended memory","level":4,"score":0.4114413261413574},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4067768454551697},{"id":"https://openalex.org/C93446704","wikidata":"https://www.wikidata.org/wiki/Q449328","display_name":"Registered memory","level":3,"score":0.3711012601852417},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.34648191928863525},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.31460368633270264},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.18041333556175232},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2660540.2661014","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2660540.2661014","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 27th Symposium on Integrated Circuits and Systems Design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320321091","display_name":"Coordena\u00e7\u00e3o de Aperfei\u00e7oamento de Pessoal de N\u00edvel Superior","ror":"https://ror.org/00x0ma614"},{"id":"https://openalex.org/F4320322025","display_name":"Conselho Nacional de Desenvolvimento Cient\u00edfico e Tecnol\u00f3gico","ror":"https://ror.org/03swz6y49"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W49493134","https://openalex.org/W1725472669","https://openalex.org/W1978201532","https://openalex.org/W1988592121","https://openalex.org/W2007946113","https://openalex.org/W2013566564","https://openalex.org/W2046995247","https://openalex.org/W2055402343","https://openalex.org/W2126308254","https://openalex.org/W2151742474","https://openalex.org/W2151950158","https://openalex.org/W2153882937","https://openalex.org/W2161423576","https://openalex.org/W2166697045","https://openalex.org/W2499724120"],"related_works":["https://openalex.org/W2753615087","https://openalex.org/W4243333834","https://openalex.org/W4248614727","https://openalex.org/W2296275612","https://openalex.org/W4379620206","https://openalex.org/W3048967625","https://openalex.org/W4293054943","https://openalex.org/W2295799647","https://openalex.org/W4312264564","https://openalex.org/W4214748026"],"abstract_inverted_index":{"Memory":[0],"subsystem":[1,30,54,133],"is":[2,48,72,89,119],"a":[3,28,148],"major":[4],"concern":[5],"in":[6,40],"the":[7,13,18,21,52,56,65,76,83,115,130,156,164],"design":[8,46],"of":[9,58,64,108,114,141,144,155],"multimedia":[10,41],"systems":[11],"and":[12,61,91,121],"memory":[14,29,39,53,95,132],"performance":[15],"may":[16],"become":[17],"bottleneck":[19],"for":[20,35,55,129],"overall":[22],"processing":[23,67],"performance.":[24],"This":[25,123,162],"work":[26],"presents":[27,125],"implementation":[31,113,127,150],"with":[32,101,134,151],"adaptive":[33,87,116,136],"control":[34,94,118],"access":[36,96],"to":[37,50,93,99,147,160],"shared":[38],"Systems-on-Chip":[42],"(SoC).":[43],"A":[44,69],"memory-centric":[45],"approach":[47,167],"used":[49],"implement":[51],"purpose":[57],"meet":[59],"bandwidth":[60],"deadline":[62,103],"requirements":[63,104],"heterogeneous":[66],"elements.":[68],"latency-based":[70],"model":[71],"obtained":[73],"based":[74],"on":[75],"Worst-Case":[77],"Response":[78],"Time":[79],"(WCRT)":[80],"criterion.":[81],"In":[82],"presented":[84,120],"approach,":[85],"an":[86,111,135],"arbiter":[88,137],"designed":[90],"implemented":[92,170],"requests":[97],"targeting":[98],"comply":[100],"clients'":[102],"managing":[105],"data":[106],"latency":[107,153],"accesses.":[109],"Also,":[110],"algorithmic":[112],"arbitration":[117],"evaluated.":[122],"paper":[124],"hardware":[126,149],"results":[128],"proposed":[131,165],"control.":[138],"Our":[139],"proposal":[140],"simple":[142],"estimation":[143],"WCRT":[145],"leads":[146],"low":[152],"calculation":[154],"system":[157],"limits":[158],"imposed":[159],"clients.":[161],"way":[163],"adaptation":[166],"can":[168],"be":[169],"at":[171],"run-time.":[172]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}