{"id":"https://openalex.org/W2052391539","doi":"https://doi.org/10.1145/2633046","title":"Preventing STT-RAM Last-Level Caches from Port Obstruction","display_name":"Preventing STT-RAM Last-Level Caches from Port Obstruction","publication_year":2014,"publication_date":"2014-07-31","ids":{"openalex":"https://openalex.org/W2052391539","doi":"https://doi.org/10.1145/2633046","mag":"2052391539"},"language":"en","primary_location":{"id":"doi:10.1145/2633046","is_oa":true,"landing_page_url":"https://doi.org/10.1145/2633046","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/2633046","source":{"id":"https://openalex.org/S26056741","display_name":"ACM Transactions on Architecture and Code Optimization","issn_l":"1544-3566","issn":["1544-3566","1544-3973"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Architecture and Code Optimization","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"bronze","oa_url":"https://dl.acm.org/doi/pdf/10.1145/2633046","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100440627","display_name":"Jue Wang","orcid":"https://orcid.org/0000-0003-1872-8457"},"institutions":[{"id":"https://openalex.org/I130769515","display_name":"Pennsylvania State University","ror":"https://ror.org/04p491231","country_code":"US","type":"education","lineage":["https://openalex.org/I130769515"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Jue Wang","raw_affiliation_strings":["Pennsylvania State University"],"affiliations":[{"raw_affiliation_string":"Pennsylvania State University","institution_ids":["https://openalex.org/I130769515"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083960440","display_name":"Xiangyu Dong","orcid":"https://orcid.org/0009-0003-5638-7558"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Xiangyu Dong","raw_affiliation_strings":["Qualcomm Technology, Inc"],"affiliations":[{"raw_affiliation_string":"Qualcomm Technology, Inc","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100385336","display_name":"Yuan Xie","orcid":"https://orcid.org/0000-0003-2093-1788"},"institutions":[{"id":"https://openalex.org/I130769515","display_name":"Pennsylvania State University","ror":"https://ror.org/04p491231","country_code":"US","type":"education","lineage":["https://openalex.org/I130769515"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yuan Xie","raw_affiliation_strings":["Pennsylvania State University"],"affiliations":[{"raw_affiliation_string":"Pennsylvania State University","institution_ids":["https://openalex.org/I130769515"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5100440627"],"corresponding_institution_ids":["https://openalex.org/I130769515"],"apc_list":null,"apc_paid":null,"fwci":0.316,"has_fulltext":true,"cited_by_count":12,"citation_normalized_percentile":{"value":0.60246255,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"11","issue":"3","first_page":"1","last_page":"19"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8319216370582581},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.7183175683021545},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.643103837966919},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.6050039529800415},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5253574252128601},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.492692768573761},{"id":"https://openalex.org/keywords/spec#","display_name":"Spec#","score":0.4384644329547882},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.43012046813964844},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.42743033170700073},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2881696820259094}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8319216370582581},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.7183175683021545},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.643103837966919},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.6050039529800415},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5253574252128601},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.492692768573761},{"id":"https://openalex.org/C2778565505","wikidata":"https://www.wikidata.org/wiki/Q2207566","display_name":"Spec#","level":2,"score":0.4384644329547882},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.43012046813964844},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.42743033170700073},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2881696820259094},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/2633046","is_oa":true,"landing_page_url":"https://doi.org/10.1145/2633046","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/2633046","source":{"id":"https://openalex.org/S26056741","display_name":"ACM Transactions on Architecture and Code Optimization","issn_l":"1544-3566","issn":["1544-3566","1544-3973"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Architecture and Code Optimization","raw_type":"journal-article"},{"id":"pmh:oai:repository.hkust.edu.hk:1783.1-133427","is_oa":false,"landing_page_url":"http://gateway.isiknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcAuth=LinksAMR&SrcApp=PARTNER_APP&DestLinkType=FullRecord&DestApp=WOS&KeyUT=000344830900001","pdf_url":null,"source":{"id":"https://openalex.org/S4306401796","display_name":"Rare & Special e-Zone (The Hong Kong University of Science and Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I200769079","host_organization_name":"Hong Kong University of Science and Technology","host_organization_lineage":["https://openalex.org/I200769079"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Article"}],"best_oa_location":{"id":"doi:10.1145/2633046","is_oa":true,"landing_page_url":"https://doi.org/10.1145/2633046","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/2633046","source":{"id":"https://openalex.org/S26056741","display_name":"ACM Transactions on Architecture and Code Optimization","issn_l":"1544-3566","issn":["1544-3566","1544-3973"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Architecture and Code Optimization","raw_type":"journal-article"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8999999761581421,"display_name":"Affordable and clean energy"}],"awards":[{"id":"https://openalex.org/G4529511670","display_name":null,"funder_award_id":"1218867, 1213052, 0903432","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G5283130955","display_name":null,"funder_award_id":"1218867","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G5587098970","display_name":null,"funder_award_id":"NSF 1218867, 1213052, 0903432","funder_id":"https://openalex.org/F4320306087","funder_display_name":"Semiconductor Research Corporation"},{"id":"https://openalex.org/G6050060231","display_name":null,"funder_award_id":"05026","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G6901979050","display_name":null,"funder_award_id":"0903432","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G8137092113","display_name":null,"funder_award_id":"1213052","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320306084","display_name":"U.S. Department of Energy","ror":"https://ror.org/01bj3aw27"},{"id":"https://openalex.org/F4320306087","display_name":"Semiconductor Research Corporation","ror":"https://ror.org/047z4n946"}],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2052391539.pdf","grobid_xml":"https://content.openalex.org/works/W2052391539.grobid-xml"},"referenced_works_count":26,"referenced_works":["https://openalex.org/W1487577846","https://openalex.org/W2008904077","https://openalex.org/W2010202670","https://openalex.org/W2020020869","https://openalex.org/W2029577083","https://openalex.org/W2084007230","https://openalex.org/W2085673070","https://openalex.org/W2096572124","https://openalex.org/W2096860342","https://openalex.org/W2100799944","https://openalex.org/W2104500100","https://openalex.org/W2105440885","https://openalex.org/W2108048675","https://openalex.org/W2108453702","https://openalex.org/W2116826022","https://openalex.org/W2129816520","https://openalex.org/W2135089498","https://openalex.org/W2141626281","https://openalex.org/W2143773524","https://openalex.org/W2147657366","https://openalex.org/W2148831941","https://openalex.org/W2155551886","https://openalex.org/W2163820265","https://openalex.org/W3145579537","https://openalex.org/W4206010581","https://openalex.org/W4232955467"],"related_works":["https://openalex.org/W2149765501","https://openalex.org/W2736888776","https://openalex.org/W4236285338","https://openalex.org/W1973775383","https://openalex.org/W3087248942","https://openalex.org/W2885593210","https://openalex.org/W4242355438","https://openalex.org/W2152933730","https://openalex.org/W2270110274","https://openalex.org/W2052391539"],"abstract_inverted_index":{"Many":[0],"new":[1],"nonvolatile":[2],"memory":[3,15],"(NVM)":[4],"technologies":[5],"have":[6],"been":[7],"heavily":[8],"studied":[9],"to":[10,80,87],"replace":[11],"the":[12,88,114],"power-hungry":[13],"SRAM/DRAM-based":[14],"hierarchy":[16],"in":[17,74],"today's":[18],"computers.":[19],"Among":[20],"various":[21],"emerging":[22],"NVM":[23],"technologies,":[24],"Spin-Transfer":[25],"Torque":[26],"RAM":[27],"(STT-RAM)":[28],"has":[29],"many":[30],"benefits,":[31],"such":[32],"as":[33],"fast":[34],"read":[35],"latency,":[36],"low":[37],"leakage":[38],"power,":[39],"and":[40,72,112,137],"high":[41],"density,":[42],"making":[43],"it":[44],"a":[45,61,123,133],"promising":[46],"candidate":[47],"for":[48],"last-level":[49],"caches":[50],"(LLCs).":[51],"1":[52],"However,":[53],"STT-RAM":[54,63,82,91,129],"write":[55,65,83],"operation":[56,66],"is":[57,85],"expensive.":[58],"In":[59,93],"particular,":[60],"long":[62],"cache":[64,70,100,107,115,131],"might":[67],"obstruct":[68],"other":[69],"accesses":[71,116],"result":[73],"severe":[75],"performance":[76,135],"degradation.":[77],"Consequently,":[78],"how":[79],"mitigate":[81],"overhead":[84],"critical":[86],"success":[89],"of":[90],"adoption.":[92],"this":[94],"article,":[95],"we":[96],"propose":[97],"an":[98,127],"obstruction-aware":[99],"management":[101],"policy":[102],"called":[103],"OAP.":[104],"OAP":[105],"monitors":[106],"traffic,":[108],"detects":[109],"LLC-obstructive":[110],"processes,":[111],"differentiates":[113],"from":[117],"different":[118],"processes.":[119],"Our":[120],"experiment":[121],"on":[122],"four-core":[124],"architecture":[125],"with":[126],"8MB":[128],"L3":[130],"shows":[132],"14%":[134],"improvement":[136],"64%":[138],"energy":[139],"reduction.":[140]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2016,"cited_by_count":1}],"updated_date":"2026-03-18T14:38:29.013473","created_date":"2025-10-10T00:00:00"}
