{"id":"https://openalex.org/W2052166264","doi":"https://doi.org/10.1145/2629551","title":"Parallelizing Data Processing on FPGAs with Shifter Lists","display_name":"Parallelizing Data Processing on FPGAs with Shifter Lists","publication_year":2015,"publication_date":"2015-03-31","ids":{"openalex":"https://openalex.org/W2052166264","doi":"https://doi.org/10.1145/2629551","mag":"2052166264"},"language":"en","primary_location":{"id":"doi:10.1145/2629551","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2629551","pdf_url":null,"source":{"id":"https://openalex.org/S112809824","display_name":"ACM Transactions on Reconfigurable Technology and Systems","issn_l":"1936-7406","issn":["1936-7406","1936-7414"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Reconfigurable Technology and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103396506","display_name":"Louis Woods","orcid":null},"institutions":[{"id":"https://openalex.org/I35440088","display_name":"ETH Zurich","ror":"https://ror.org/05a28rw58","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I35440088"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Louis Woods","raw_affiliation_strings":["Systems Group, Department of Computer Science, ETH Z\u00fcrich, Switzerland","Systems Group, Department of Computer Science, ETH Zurich, Switzerland#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Systems Group, Department of Computer Science, ETH Z\u00fcrich, Switzerland","institution_ids":["https://openalex.org/I35440088"]},{"raw_affiliation_string":"Systems Group, Department of Computer Science, ETH Zurich, Switzerland#TAB#","institution_ids":["https://openalex.org/I35440088"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103144919","display_name":"Gustavo Alonso","orcid":"https://orcid.org/0000-0002-4396-6695"},"institutions":[{"id":"https://openalex.org/I35440088","display_name":"ETH Zurich","ror":"https://ror.org/05a28rw58","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I35440088"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Gustavo Alonso","raw_affiliation_strings":["Systems Group, Department of Computer Science, ETH Z\u00fcrich, Switzerland","Systems Group, Department of Computer Science, ETH Zurich, Switzerland#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Systems Group, Department of Computer Science, ETH Z\u00fcrich, Switzerland","institution_ids":["https://openalex.org/I35440088"]},{"raw_affiliation_string":"Systems Group, Department of Computer Science, ETH Zurich, Switzerland#TAB#","institution_ids":["https://openalex.org/I35440088"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5069919328","display_name":"Jens Teubner","orcid":"https://orcid.org/0000-0002-0344-5203"},"institutions":[{"id":"https://openalex.org/I200332995","display_name":"TU Dortmund University","ror":"https://ror.org/01k97gp34","country_code":"DE","type":"education","lineage":["https://openalex.org/I200332995"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Jens Teubner","raw_affiliation_strings":["DBIS Group, Department of Computer Science, TU Dortmund University, Germany","DBIS Group, Department of Computer Science, TU Dortmund University, Germany#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"DBIS Group, Department of Computer Science, TU Dortmund University, Germany","institution_ids":["https://openalex.org/I200332995"]},{"raw_affiliation_string":"DBIS Group, Department of Computer Science, TU Dortmund University, Germany#TAB#","institution_ids":["https://openalex.org/I200332995"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.9031,"has_fulltext":false,"cited_by_count":13,"citation_normalized_percentile":{"value":0.906985,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"8","issue":"2","first_page":"1","last_page":"22"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12292","display_name":"Graph Theory and Algorithms","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9957000017166138,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8849648237228394},{"id":"https://openalex.org/keywords/data-parallelism","display_name":"Data parallelism","score":0.7703102827072144},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.7513805031776428},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5476819276809692},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5337482690811157},{"id":"https://openalex.org/keywords/task-parallelism","display_name":"Task parallelism","score":0.5082752108573914},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.49842309951782227},{"id":"https://openalex.org/keywords/instruction-level-parallelism","display_name":"Instruction-level parallelism","score":0.4454419016838074},{"id":"https://openalex.org/keywords/leverage","display_name":"Leverage (statistics)","score":0.4199420213699341},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.41490280628204346},{"id":"https://openalex.org/keywords/parallelism","display_name":"Parallelism (grammar)","score":0.4082567095756531},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.20577788352966309}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8849648237228394},{"id":"https://openalex.org/C61483411","wikidata":"https://www.wikidata.org/wiki/Q3124522","display_name":"Data parallelism","level":3,"score":0.7703102827072144},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.7513805031776428},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5476819276809692},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5337482690811157},{"id":"https://openalex.org/C42992933","wikidata":"https://www.wikidata.org/wiki/Q691169","display_name":"Task parallelism","level":3,"score":0.5082752108573914},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.49842309951782227},{"id":"https://openalex.org/C140763907","wikidata":"https://www.wikidata.org/wiki/Q2714055","display_name":"Instruction-level parallelism","level":3,"score":0.4454419016838074},{"id":"https://openalex.org/C153083717","wikidata":"https://www.wikidata.org/wiki/Q6535263","display_name":"Leverage (statistics)","level":2,"score":0.4199420213699341},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.41490280628204346},{"id":"https://openalex.org/C2781172179","wikidata":"https://www.wikidata.org/wiki/Q853109","display_name":"Parallelism (grammar)","level":2,"score":0.4082567095756531},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.20577788352966309},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2629551","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2629551","pdf_url":null,"source":{"id":"https://openalex.org/S112809824","display_name":"ACM Transactions on Reconfigurable Technology and Systems","issn_l":"1936-7406","issn":["1936-7406","1936-7414"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Reconfigurable Technology and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.41999998688697815}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":23,"referenced_works":["https://openalex.org/W97766842","https://openalex.org/W1517348552","https://openalex.org/W1597755753","https://openalex.org/W1970779762","https://openalex.org/W1991859582","https://openalex.org/W2004791924","https://openalex.org/W2006312753","https://openalex.org/W2032852272","https://openalex.org/W2038509324","https://openalex.org/W2072974923","https://openalex.org/W2088207049","https://openalex.org/W2098730617","https://openalex.org/W2108220022","https://openalex.org/W2108856845","https://openalex.org/W2112678088","https://openalex.org/W2115658433","https://openalex.org/W2123495558","https://openalex.org/W2131595909","https://openalex.org/W2148910853","https://openalex.org/W2170188482","https://openalex.org/W2170675383","https://openalex.org/W2613360538","https://openalex.org/W2735346238"],"related_works":["https://openalex.org/W2003935582","https://openalex.org/W2950520577","https://openalex.org/W74409296","https://openalex.org/W1229628","https://openalex.org/W2468095077","https://openalex.org/W2567390125","https://openalex.org/W1991844655","https://openalex.org/W2009213655","https://openalex.org/W2494130044","https://openalex.org/W2105992728"],"abstract_inverted_index":{"Parallelism":[0],"is":[1,63,182,247],"currently":[2],"seen":[3],"as":[4,260],"a":[5,42,79,95,100,112,137,143,178,187,192,215,226,232,253],"mechanism":[6],"to":[7,38,56,84,119,130,184,206,214,249,251],"minimize":[8],"the":[9,12,26,32,34,64,73,86,109,116,121,148,167,173,208],"impact":[10],"of":[11,45,58,75,108,111,115,147,169,186,197,218,255],"power":[13],"and":[14,172],"heat":[15],"dissipation":[16],"problems":[17,53],"encountered":[18],"in":[19,155],"modern":[20],"hardware.":[21],"Data":[22],"parallelism\u2014based":[23,29],"on":[24,30,41,91,136,177,241],"partitioning":[25,31,120],"data\u2014and":[27],"pipeline":[28,132],"computation\u2014are":[33],"two":[35],"main":[36],"approaches":[37,83],"leverage":[39],"parallelism":[40,135],"wide":[43],"range":[44,217],"hardware":[46,150],"platforms.":[47],"Unfortunately,":[48],"not":[49],"all":[50],"data":[51,92,134,194,219,230],"processing":[52,170,220],"are":[54,89],"susceptible":[55],"either":[57],"those":[59],"strategies.":[60],"An":[61],"example":[62],"skyline":[65,87,158,198,209],"operator":[66,88,210],"[B\u00f6rzs\u00f6nyi":[67],"et":[68,200],"al.":[69,201],"2001],":[70],"which":[71],"computes":[72],"set":[74],"Pareto-optimal":[76],"points":[77],"within":[78],"multidimensional":[80],"dataset.":[81],"Existing":[82],"parallelize":[85,207],"based":[90],"parallelism.":[93,151],"As":[94,152],"result,":[96],"they":[97],"suffer":[98],"from":[99],"high":[101],"overhead":[102],"when":[103],"merging":[104],"intermediate":[105],"results":[106],"because":[107],"lack":[110],"global":[113],"view":[114],"problem":[117],"inherent":[118],"input":[122],"data.":[123],"In":[124],"this":[125,224],"article,":[126],"we":[127,153,175],"show":[128,154],"how":[129],"combine":[131],"with":[133,166],"Field-Programmable":[138],"Gate":[139],"Array":[140],"(FPGA)":[141],"for":[142],"more":[144],"efficient":[145],"utilization":[146],"available":[149],"our":[156,161],"experiments,":[157],"computation":[159],"using":[160],"proposed":[162,204],"technique":[163],"scales":[164],"linearly":[165],"number":[168],"elements,":[171],"performance":[174],"achieve":[176],"rather":[179],"small":[180],"FPGA":[181],"comparable":[183],"that":[185,236],"64-core":[188],"high-end":[189],"server":[190],"running":[191],"state-of-the-art":[193],"parallel":[195,229],"implementation":[196],"[Park":[199],"2009].":[202],"The":[203,244],"approach":[205],"can":[211,237],"be":[212,238],"generalized":[213],"wider":[216],"problems.":[221],"We":[222],"demonstrate":[223],"through":[225],"novel,":[227],"highly":[228],"structure,":[231],"shifter":[233],"list":[234],",":[235,263,267],"efficiently":[239],"implemented":[240],"an":[242],"FPGA.":[243],"resulting":[245],"template":[246],"easy":[248],"parametrize":[250],"implement":[252],"variety":[254],"computationally":[256],"intensive":[257],"operators":[258],"such":[259],"frequent":[261],"items":[262],"n":[264],"-closest":[265],"pairs":[266],"or":[268],"K-means":[269],".":[270]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2018,"cited_by_count":4},{"year":2017,"cited_by_count":4},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}
