{"id":"https://openalex.org/W2098565508","doi":"https://doi.org/10.1145/2612262.2612265","title":"VMM emulation of Intel hardware transactional memory","display_name":"VMM emulation of Intel hardware transactional memory","publication_year":2014,"publication_date":"2014-06-10","ids":{"openalex":"https://openalex.org/W2098565508","doi":"https://doi.org/10.1145/2612262.2612265","mag":"2098565508"},"language":"en","primary_location":{"id":"doi:10.1145/2612262.2612265","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2612262.2612265","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 4th International Workshop on Runtime and Operating Systems for Supercomputers","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5018758241","display_name":"Maciej Swiech","orcid":null},"institutions":[{"id":"https://openalex.org/I111979921","display_name":"Northwestern University","ror":"https://ror.org/000e0be47","country_code":"US","type":"education","lineage":["https://openalex.org/I111979921"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Maciej Swiech","raw_affiliation_strings":["Northwestern University","Northwestern University****"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Northwestern University","institution_ids":[]},{"raw_affiliation_string":"Northwestern University****","institution_ids":["https://openalex.org/I111979921"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054446539","display_name":"Kyle C. Hale","orcid":"https://orcid.org/0000-0001-9488-9311"},"institutions":[{"id":"https://openalex.org/I111979921","display_name":"Northwestern University","ror":"https://ror.org/000e0be47","country_code":"US","type":"education","lineage":["https://openalex.org/I111979921"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kyle C. Hale","raw_affiliation_strings":["Northwestern University","Northwestern University****"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Northwestern University","institution_ids":[]},{"raw_affiliation_string":"Northwestern University****","institution_ids":["https://openalex.org/I111979921"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5077304920","display_name":"Peter A. Dinda","orcid":"https://orcid.org/0000-0001-5315-5987"},"institutions":[{"id":"https://openalex.org/I111979921","display_name":"Northwestern University","ror":"https://ror.org/000e0be47","country_code":"US","type":"education","lineage":["https://openalex.org/I111979921"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Peter Dinda","raw_affiliation_strings":["Northwestern University","Northwestern University****"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Northwestern University","institution_ids":[]},{"raw_affiliation_string":"Northwestern University****","institution_ids":["https://openalex.org/I111979921"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I111979921"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13471","display_name":"Cognitive Functions and Memory","score":0.996399998664856,"subfield":{"id":"https://openalex.org/subfields/3205","display_name":"Experimental and Cognitive Psychology"},"field":{"id":"https://openalex.org/fields/32","display_name":"Psychology"},"domain":{"id":"https://openalex.org/domains/2","display_name":"Social Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.987500011920929,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8178364634513855},{"id":"https://openalex.org/keywords/emulation","display_name":"Emulation","score":0.7568463087081909},{"id":"https://openalex.org/keywords/transactional-memory","display_name":"Transactional memory","score":0.7438547611236572},{"id":"https://openalex.org/keywords/x86","display_name":"x86","score":0.6390209197998047},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.638659656047821},{"id":"https://openalex.org/keywords/software-transactional-memory","display_name":"Software transactional memory","score":0.582410991191864},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5761209726333618},{"id":"https://openalex.org/keywords/context","display_name":"Context (archaeology)","score":0.4636799693107605},{"id":"https://openalex.org/keywords/debugging","display_name":"Debugging","score":0.45730096101760864},{"id":"https://openalex.org/keywords/hardware-emulation","display_name":"Hardware emulation","score":0.4356752634048462},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.38551270961761475},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3693373203277588},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.362759530544281},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.16947069764137268}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8178364634513855},{"id":"https://openalex.org/C149810388","wikidata":"https://www.wikidata.org/wiki/Q5374873","display_name":"Emulation","level":2,"score":0.7568463087081909},{"id":"https://openalex.org/C134277064","wikidata":"https://www.wikidata.org/wiki/Q878206","display_name":"Transactional memory","level":3,"score":0.7438547611236572},{"id":"https://openalex.org/C170723468","wikidata":"https://www.wikidata.org/wiki/Q182933","display_name":"x86","level":3,"score":0.6390209197998047},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.638659656047821},{"id":"https://openalex.org/C167149655","wikidata":"https://www.wikidata.org/wiki/Q1189004","display_name":"Software transactional memory","level":4,"score":0.582410991191864},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5761209726333618},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.4636799693107605},{"id":"https://openalex.org/C168065819","wikidata":"https://www.wikidata.org/wiki/Q845566","display_name":"Debugging","level":2,"score":0.45730096101760864},{"id":"https://openalex.org/C94115699","wikidata":"https://www.wikidata.org/wiki/Q5656406","display_name":"Hardware emulation","level":3,"score":0.4356752634048462},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.38551270961761475},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3693373203277588},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.362759530544281},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.16947069764137268},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C50522688","wikidata":"https://www.wikidata.org/wiki/Q189833","display_name":"Economic growth","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C75949130","wikidata":"https://www.wikidata.org/wiki/Q848010","display_name":"Database transaction","level":2,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/2612262.2612265","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2612262.2612265","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 4th International Workshop on Runtime and Operating Systems for Supercomputers","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.431.1018","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.431.1018","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.cs.northwestern.edu/~pdinda/Papers/ross14.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1986913310","https://openalex.org/W2042082001","https://openalex.org/W2099327218","https://openalex.org/W2099537990","https://openalex.org/W2107150212","https://openalex.org/W2113751407","https://openalex.org/W2149473197","https://openalex.org/W2589316285","https://openalex.org/W2611973536","https://openalex.org/W4234703016"],"related_works":["https://openalex.org/W2088444093","https://openalex.org/W133473147","https://openalex.org/W4252722439","https://openalex.org/W924353067","https://openalex.org/W2152491655","https://openalex.org/W2992926879","https://openalex.org/W1144911151","https://openalex.org/W2076409732","https://openalex.org/W120707803","https://openalex.org/W2092832855"],"abstract_inverted_index":{"We":[0,140],"describe":[1],"the":[2,13,146,149],"design,":[3],"implementation,":[4],"and":[5,49,107,128,159],"evaluation":[6],"of":[7,91,148],"emulated":[8,55],"hardware":[9,38,56],"transactional":[10,47],"memory,":[11],"specifically":[12],"Intel":[14],"Haswell":[15],"Restricted":[16],"Transactional":[17],"Memory":[18],"(RTM)":[19],"architectural":[20],"extensions":[21],"for":[22],"x86/64,":[23],"within":[24],"a":[25,85,95],"virtual":[26],"machine":[27],"monitor":[28],"(VMM).":[29],"Our":[30,152],"system":[31,93,144],"allows":[32,100],"users":[33],"to":[34,76,102,108,112,116,124,157],"investigate":[35],"RTM":[36,126],"on":[37,53],"that":[39,62,72,99,114],"does":[40],"not":[41,155],"provide":[42],"it,":[43],"debug":[44],"their":[45],"RTM-based":[46],"software,":[48],"stress":[50],"test":[51],"it":[52,122],"diverse":[54],"configurations,":[57],"including":[58],"potential":[59],"future":[60],"configurations":[61],"might":[63],"support":[64],"arbitrary":[65],"length":[66],"transactions.":[67],"Initial":[68],"performance":[69],"results":[70],"suggest":[71],"we":[73],"are":[74,154],"able":[75],"accomplish":[77],"this":[78],"approximately":[79],"60":[80],"times":[81],"faster":[82],"than":[83,135],"under":[84],"full":[86],"emulator.":[87],"A":[88],"noteworthy":[89],"aspect":[90],"our":[92,143],"is":[94],"novel":[96],"page-flipping":[97],"technique":[98],"us":[101],"completely":[103],"avoid":[104],"instruction":[105,110,118],"emulation,":[106,127],"limit":[109],"decoding":[111],"only":[113],"necessary":[115],"determine":[117],"length.":[119],"This":[120],"makes":[121],"possible":[123],"implement":[125],"potentially":[129],"other":[130,164],"techniques,":[131],"far":[132],"more":[133],"compactly":[134],"would":[136],"otherwise":[137],"be":[138,161],"possible.":[139],"have":[141],"implemented":[142,162],"in":[145,163],"context":[147],"Palacios":[150],"VMM.":[151],"techniques":[153],"specific":[156],"Palacios,":[158],"could":[160],"VMMs.":[165]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2019,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}