{"id":"https://openalex.org/W2119751241","doi":"https://doi.org/10.1145/2593069.2593079","title":"A SystemC Virtual Prototyping based Methodology for Multi-Standard SoC Functional Verification","display_name":"A SystemC Virtual Prototyping based Methodology for Multi-Standard SoC Functional Verification","publication_year":2014,"publication_date":"2014-05-27","ids":{"openalex":"https://openalex.org/W2119751241","doi":"https://doi.org/10.1145/2593069.2593079","mag":"2119751241"},"language":"en","primary_location":{"id":"doi:10.1145/2593069.2593079","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2593069.2593079","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 51st Annual Design Automation Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5009546648","display_name":"Zhimiao Chen","orcid":null},"institutions":[{"id":"https://openalex.org/I4210124274","display_name":"Fraunhofer Institute for Integrated Circuits","ror":"https://ror.org/024ape423","country_code":"DE","type":"facility","lineage":["https://openalex.org/I4210124274","https://openalex.org/I4923324"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Zhimiao Chen","raw_affiliation_strings":["Chair of Integrated Analog Circuits and RF Systems, Templergraben 55, Aachen, Germany"],"affiliations":[{"raw_affiliation_string":"Chair of Integrated Analog Circuits and RF Systems, Templergraben 55, Aachen, Germany","institution_ids":["https://openalex.org/I4210124274"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100398561","display_name":"Yifan Wang","orcid":"https://orcid.org/0000-0002-4519-7535"},"institutions":[{"id":"https://openalex.org/I4210124274","display_name":"Fraunhofer Institute for Integrated Circuits","ror":"https://ror.org/024ape423","country_code":"DE","type":"facility","lineage":["https://openalex.org/I4210124274","https://openalex.org/I4923324"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Yifan Wang","raw_affiliation_strings":["Chair of Integrated Analog Circuits and RF Systems, Templergraben 55, Aachen, Germany"],"affiliations":[{"raw_affiliation_string":"Chair of Integrated Analog Circuits and RF Systems, Templergraben 55, Aachen, Germany","institution_ids":["https://openalex.org/I4210124274"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110278947","display_name":"Lei Liao","orcid":null},"institutions":[{"id":"https://openalex.org/I4210124274","display_name":"Fraunhofer Institute for Integrated Circuits","ror":"https://ror.org/024ape423","country_code":"DE","type":"facility","lineage":["https://openalex.org/I4210124274","https://openalex.org/I4923324"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Lei Liao","raw_affiliation_strings":["Chair of Integrated Analog Circuits and RF Systems, Templergraben 55, Aachen, Germany"],"affiliations":[{"raw_affiliation_string":"Chair of Integrated Analog Circuits and RF Systems, Templergraben 55, Aachen, Germany","institution_ids":["https://openalex.org/I4210124274"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100449286","display_name":"Ye Zhang","orcid":"https://orcid.org/0000-0001-7783-6584"},"institutions":[{"id":"https://openalex.org/I4210124274","display_name":"Fraunhofer Institute for Integrated Circuits","ror":"https://ror.org/024ape423","country_code":"DE","type":"facility","lineage":["https://openalex.org/I4210124274","https://openalex.org/I4923324"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Ye Zhang","raw_affiliation_strings":["Chair of Integrated Analog Circuits and RF Systems, Templergraben 55, Aachen, Germany"],"affiliations":[{"raw_affiliation_string":"Chair of Integrated Analog Circuits and RF Systems, Templergraben 55, Aachen, Germany","institution_ids":["https://openalex.org/I4210124274"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5041847586","display_name":"Aytac Atac","orcid":null},"institutions":[{"id":"https://openalex.org/I4210124274","display_name":"Fraunhofer Institute for Integrated Circuits","ror":"https://ror.org/024ape423","country_code":"DE","type":"facility","lineage":["https://openalex.org/I4210124274","https://openalex.org/I4923324"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Atac Aytac","raw_affiliation_strings":["Chair of Integrated Analog Circuits and RF Systems, Templergraben 55, Aachen, Germany"],"affiliations":[{"raw_affiliation_string":"Chair of Integrated Analog Circuits and RF Systems, Templergraben 55, Aachen, Germany","institution_ids":["https://openalex.org/I4210124274"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5024380454","display_name":"Jan M\u00fcller","orcid":null},"institutions":[{"id":"https://openalex.org/I4210124274","display_name":"Fraunhofer Institute for Integrated Circuits","ror":"https://ror.org/024ape423","country_code":"DE","type":"facility","lineage":["https://openalex.org/I4210124274","https://openalex.org/I4923324"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Jan Henning M\u00fcller","raw_affiliation_strings":["Chair of Integrated Analog Circuits and RF Systems, Templergraben 55, Aachen, Germany"],"affiliations":[{"raw_affiliation_string":"Chair of Integrated Analog Circuits and RF Systems, Templergraben 55, Aachen, Germany","institution_ids":["https://openalex.org/I4210124274"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033528054","display_name":"Ralf Wunderlich","orcid":"https://orcid.org/0000-0001-5841-6293"},"institutions":[{"id":"https://openalex.org/I4210124274","display_name":"Fraunhofer Institute for Integrated Circuits","ror":"https://ror.org/024ape423","country_code":"DE","type":"facility","lineage":["https://openalex.org/I4210124274","https://openalex.org/I4923324"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Ralf Wunderlich","raw_affiliation_strings":["Chair of Integrated Analog Circuits and RF Systems, Templergraben 55, Aachen, Germany"],"affiliations":[{"raw_affiliation_string":"Chair of Integrated Analog Circuits and RF Systems, Templergraben 55, Aachen, Germany","institution_ids":["https://openalex.org/I4210124274"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5039003474","display_name":"Stefan Heinen","orcid":"https://orcid.org/0009-0001-7568-8116"},"institutions":[{"id":"https://openalex.org/I4210124274","display_name":"Fraunhofer Institute for Integrated Circuits","ror":"https://ror.org/024ape423","country_code":"DE","type":"facility","lineage":["https://openalex.org/I4210124274","https://openalex.org/I4923324"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Stefan Heinen","raw_affiliation_strings":["Chair of Integrated Analog Circuits and RF Systems, Templergraben 55, Aachen, Germany"],"affiliations":[{"raw_affiliation_string":"Chair of Integrated Analog Circuits and RF Systems, Templergraben 55, Aachen, Germany","institution_ids":["https://openalex.org/I4210124274"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":8,"corresponding_author_ids":["https://openalex.org/A5009546648"],"corresponding_institution_ids":["https://openalex.org/I4210124274"],"apc_list":null,"apc_paid":null,"fwci":0.3143,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.62605436,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/systemc","display_name":"SystemC","score":0.9232120513916016},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7998799085617065},{"id":"https://openalex.org/keywords/virtual-prototyping","display_name":"Virtual prototyping","score":0.6689296960830688},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6203644871711731},{"id":"https://openalex.org/keywords/baseband","display_name":"Baseband","score":0.5871506333351135},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.44953563809394836},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.43290019035339355},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.4199956953525543},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3985077142715454},{"id":"https://openalex.org/keywords/simulation","display_name":"Simulation","score":0.1983059048652649}],"concepts":[{"id":"https://openalex.org/C2776928060","wikidata":"https://www.wikidata.org/wiki/Q1753563","display_name":"SystemC","level":2,"score":0.9232120513916016},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7998799085617065},{"id":"https://openalex.org/C2780991453","wikidata":"https://www.wikidata.org/wiki/Q3408177","display_name":"Virtual prototyping","level":2,"score":0.6689296960830688},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6203644871711731},{"id":"https://openalex.org/C65165936","wikidata":"https://www.wikidata.org/wiki/Q575784","display_name":"Baseband","level":3,"score":0.5871506333351135},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.44953563809394836},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.43290019035339355},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.4199956953525543},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3985077142715454},{"id":"https://openalex.org/C44154836","wikidata":"https://www.wikidata.org/wiki/Q45045","display_name":"Simulation","level":1,"score":0.1983059048652649},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/2593069.2593079","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2593069.2593079","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 51st Annual Design Automation Conference","raw_type":"proceedings-article"},{"id":"pmh:oai:publications.rwth-aachen.de:463109","is_oa":false,"landing_page_url":"https://publications.rwth-aachen.de/record/463109","pdf_url":null,"source":{"id":"https://openalex.org/S4306401362","display_name":"RWTH Publications (RWTH Aachen)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I887968799","host_organization_name":"RWTH Aachen University","host_organization_lineage":["https://openalex.org/I887968799"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"51st ACM/EDAC/IEEE Design Automation Conference (DAC), 2014 : 1 - 5 June 2014, Moscone Center, San Francisco, CA ; conference proceedings<br/>51. Annual Design Automation Conference, DAC, San Francisco, CA, USA, 2014-06-01 - 2014-06-05","raw_type":"info:eu-repo/semantics/publishedVersion"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Life below water","score":0.5799999833106995,"id":"https://metadata.un.org/sdg/14"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W2037234969","https://openalex.org/W2080279741","https://openalex.org/W2103089145","https://openalex.org/W2132543899","https://openalex.org/W2165759561","https://openalex.org/W2211730499","https://openalex.org/W2532002741","https://openalex.org/W4300881648"],"related_works":["https://openalex.org/W3015414207","https://openalex.org/W2007493856","https://openalex.org/W1614428294","https://openalex.org/W2119751241","https://openalex.org/W2801292404","https://openalex.org/W1550409889","https://openalex.org/W1830510111","https://openalex.org/W2039065447","https://openalex.org/W2208074837","https://openalex.org/W4238487776"],"abstract_inverted_index":{"This":[0,77],"paper":[1],"describes":[2],"a":[3,82],"functional":[4],"verification":[5],"methodology":[6,78],"for":[7,81],"multi-standard":[8],"wireless":[9],"Systems-on-Chip":[10],"(SoC)":[11],"based":[12],"on":[13],"SystemC":[14],"Virtual":[15],"Prototyping":[16],"(VP).":[17],"The":[18],"proposed":[19],"semiautomatic":[20],"pin-accurate":[21],"RF":[22,85],"VP":[23],"generation":[24],"method":[25],"reduces":[26],"huge":[27],"handcrafting":[28],"work":[29],"to":[30,45,69,74],"abstract":[31],"circuitry":[32],"into":[33],"the":[34,43,88],"event-driven":[35],"simulation":[36,71,90],"domain":[37],"with":[38,87],"satisfactory":[39],"accuracy,":[40],"while":[41],"enabling":[42],"flexibility":[44],"choose":[46],"different":[47],"abstraction":[48],"levels.":[49],"A":[50],"seamless":[51],"transition":[52],"between":[53],"various":[54],"signal":[55],"abstractions":[56],"is":[57,79],"enabled":[58],"by":[59],"operator":[60],"overload,":[61],"e.g.":[62],"passband":[63],"and":[64],"equivalent":[65],"baseband":[66],"in":[67,94],"order":[68],"minimize":[70],"time":[72],"according":[73],"test":[75],"cases.":[76],"demonstrated":[80],"low":[83],"power":[84],"transceiver":[86],"achieved":[89],"speed":[91],"of":[92],"500\u03bcs":[93],"10s":[95],"computation":[96],"time.":[97]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}