{"id":"https://openalex.org/W2140837989","doi":"https://doi.org/10.1145/2555486.2555488","title":"A framework for design space exploration and performance analysis of networked embedded systems","display_name":"A framework for design space exploration and performance analysis of networked embedded systems","publication_year":2014,"publication_date":"2014-01-14","ids":{"openalex":"https://openalex.org/W2140837989","doi":"https://doi.org/10.1145/2555486.2555488","mag":"2140837989"},"language":"en","primary_location":{"id":"doi:10.1145/2555486.2555488","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2555486.2555488","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 6th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5062316918","display_name":"Emad Ebeid","orcid":"https://orcid.org/0000-0002-7847-149X"},"institutions":[{"id":"https://openalex.org/I119439378","display_name":"University of Verona","ror":"https://ror.org/039bp8j42","country_code":"IT","type":"education","lineage":["https://openalex.org/I119439378"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Emad Ebeid","raw_affiliation_strings":["University of Verona, Italy","University of Verona - Italy#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Verona, Italy","institution_ids":["https://openalex.org/I119439378"]},{"raw_affiliation_string":"University of Verona - Italy#TAB#","institution_ids":["https://openalex.org/I119439378"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5040302302","display_name":"Franco Fummi","orcid":"https://orcid.org/0000-0002-4404-5791"},"institutions":[{"id":"https://openalex.org/I119439378","display_name":"University of Verona","ror":"https://ror.org/039bp8j42","country_code":"IT","type":"education","lineage":["https://openalex.org/I119439378"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Franco Fummi","raw_affiliation_strings":["University of Verona, Italy","University of Verona - Italy#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Verona, Italy","institution_ids":["https://openalex.org/I119439378"]},{"raw_affiliation_string":"University of Verona - Italy#TAB#","institution_ids":["https://openalex.org/I119439378"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050479727","display_name":"Davide Quaglia","orcid":"https://orcid.org/0000-0002-0775-939X"},"institutions":[{"id":"https://openalex.org/I119439378","display_name":"University of Verona","ror":"https://ror.org/039bp8j42","country_code":"IT","type":"education","lineage":["https://openalex.org/I119439378"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Davide Quaglia","raw_affiliation_strings":["University of Verona, Italy","University of Verona - Italy#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Verona, Italy","institution_ids":["https://openalex.org/I119439378"]},{"raw_affiliation_string":"University of Verona - Italy#TAB#","institution_ids":["https://openalex.org/I119439378"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065692337","display_name":"Hector Posadash","orcid":null},"institutions":[{"id":"https://openalex.org/I13134134","display_name":"Universidad de Cantabria","ror":"https://ror.org/046ffzj20","country_code":"ES","type":"education","lineage":["https://openalex.org/I13134134"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Hector Posadash","raw_affiliation_strings":["University of Cantabria, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Cantabria, Spain","institution_ids":["https://openalex.org/I13134134"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5032788928","display_name":"Eugenio Villar","orcid":"https://orcid.org/0000-0002-6541-6176"},"institutions":[{"id":"https://openalex.org/I13134134","display_name":"Universidad de Cantabria","ror":"https://ror.org/046ffzj20","country_code":"ES","type":"education","lineage":["https://openalex.org/I13134134"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Eugenio Villar","raw_affiliation_strings":["University of Cantabria, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Cantabria, Spain","institution_ids":["https://openalex.org/I13134134"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/systemc","display_name":"SystemC","score":0.9232273697853088},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.8331344127655029},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8108707666397095},{"id":"https://openalex.org/keywords/unified-modeling-language","display_name":"Unified Modeling Language","score":0.6295061707496643},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5160095691680908},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.4663402736186981},{"id":"https://openalex.org/keywords/joint","display_name":"Joint (building)","score":0.46440601348876953},{"id":"https://openalex.org/keywords/automotive-industry","display_name":"Automotive industry","score":0.46153271198272705},{"id":"https://openalex.org/keywords/systems-design","display_name":"Systems design","score":0.46078741550445557},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.4417096972465515},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.42560359835624695},{"id":"https://openalex.org/keywords/electronic-system-level-design-and-verification","display_name":"Electronic system-level design and verification","score":0.4183429777622223},{"id":"https://openalex.org/keywords/code","display_name":"Code (set theory)","score":0.41288822889328003},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.19571247696876526},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.17134183645248413},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.10053607821464539},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09891045093536377},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.08748728036880493}],"concepts":[{"id":"https://openalex.org/C2776928060","wikidata":"https://www.wikidata.org/wiki/Q1753563","display_name":"SystemC","level":2,"score":0.9232273697853088},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.8331344127655029},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8108707666397095},{"id":"https://openalex.org/C145644426","wikidata":"https://www.wikidata.org/wiki/Q169411","display_name":"Unified Modeling Language","level":3,"score":0.6295061707496643},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5160095691680908},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.4663402736186981},{"id":"https://openalex.org/C18555067","wikidata":"https://www.wikidata.org/wiki/Q8375051","display_name":"Joint (building)","level":2,"score":0.46440601348876953},{"id":"https://openalex.org/C526921623","wikidata":"https://www.wikidata.org/wiki/Q190117","display_name":"Automotive industry","level":2,"score":0.46153271198272705},{"id":"https://openalex.org/C31352089","wikidata":"https://www.wikidata.org/wiki/Q3750474","display_name":"Systems design","level":2,"score":0.46078741550445557},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.4417096972465515},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.42560359835624695},{"id":"https://openalex.org/C77495112","wikidata":"https://www.wikidata.org/wiki/Q5358436","display_name":"Electronic system-level design and verification","level":2,"score":0.4183429777622223},{"id":"https://openalex.org/C2776760102","wikidata":"https://www.wikidata.org/wiki/Q5139990","display_name":"Code (set theory)","level":3,"score":0.41288822889328003},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.19571247696876526},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.17134183645248413},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.10053607821464539},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09891045093536377},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.08748728036880493},{"id":"https://openalex.org/C170154142","wikidata":"https://www.wikidata.org/wiki/Q150737","display_name":"Architectural engineering","level":1,"score":0.0},{"id":"https://openalex.org/C146978453","wikidata":"https://www.wikidata.org/wiki/Q3798668","display_name":"Aerospace engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2555486.2555488","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2555486.2555488","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 6th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.4099999964237213}],"awards":[{"id":"https://openalex.org/G8144737362","display_name":null,"funder_award_id":"CONTREX 611146","funder_id":"https://openalex.org/F4320334960","funder_display_name":"Seventh Framework Programme"}],"funders":[{"id":"https://openalex.org/F4320334960","display_name":"Seventh Framework Programme","ror":"https://ror.org/00k4n6c32"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W89228883","https://openalex.org/W1966036452","https://openalex.org/W1968682853","https://openalex.org/W1987553023","https://openalex.org/W2007073181","https://openalex.org/W2009680616","https://openalex.org/W2038583503","https://openalex.org/W2090531369","https://openalex.org/W2158034620","https://openalex.org/W2171620223","https://openalex.org/W2539764975","https://openalex.org/W4240176956","https://openalex.org/W4245280958"],"related_works":["https://openalex.org/W2790192245","https://openalex.org/W2130650583","https://openalex.org/W2548514518","https://openalex.org/W2059569687","https://openalex.org/W1996984607","https://openalex.org/W2159088510","https://openalex.org/W2170029576","https://openalex.org/W2975035977","https://openalex.org/W2146455550","https://openalex.org/W2115228044"],"abstract_inverted_index":{"The":[0],"design":[1,38,90,124],"of":[2,13,32,79,101,123],"the":[3,11,41,49,73,87,96,114,120],"network":[4,19,36],"in":[5],"distributed":[6],"embedded":[7],"systems":[8],"often":[9],"necessitates":[10],"analysis":[12],"its":[14],"HW/SW":[15,34,63,80],"tradeoffs":[16,78],"along":[17],"with":[18],"tradeoffs.":[20],"To":[21],"do":[22],"so,":[23],"a":[24],"framework":[25,115],"is":[26,57,104,116],"presented":[27],"to":[28,47,59,71,85,94,106,118],"perform":[29],"joint":[30,89],"exploration":[31],"both":[33],"and":[35,52,64,69,81,111],"(NW)":[37],"spaces.":[39],"In":[40,92],"proposed":[42,97],"approach,":[43],"UML+Profiles":[44],"are":[45,67,83],"used":[46,70,105],"model":[48],"whole":[50],"system":[51,75],"SystemC":[53],"code":[54],"generation":[55],"mechanism":[56],"exploited":[58],"validate":[60,95],"it.":[61],"SystemC-based":[62],"NW":[65,82],"simulators":[66],"integrated":[68],"simulate":[72],"overall":[74,88],"model.":[76],"Design":[77],"characterized":[84],"define":[86],"space.":[91],"order":[93],"framework,":[98],"an":[99],"example":[100],"automotive":[102],"application":[103],"explore":[107],"several":[108],"performance":[109],"metrics":[110],"show":[112],"how":[113],"able":[117],"find":[119],"optimal":[121],"set":[122],"parameters.":[125]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2017,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
