{"id":"https://openalex.org/W1966460368","doi":"https://doi.org/10.1145/2554688.2554783","title":"Towards interconnect-adaptive packing for FPGAs","display_name":"Towards interconnect-adaptive packing for FPGAs","publication_year":2014,"publication_date":"2014-02-18","ids":{"openalex":"https://openalex.org/W1966460368","doi":"https://doi.org/10.1145/2554688.2554783","mag":"1966460368"},"language":"en","primary_location":{"id":"doi:10.1145/2554688.2554783","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2554688.2554783","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5060132254","display_name":"Jason Luu","orcid":null},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Jason Luu","raw_affiliation_strings":["University of Toronto, Toronto, ON, Canada","University of Toronto, Toronto, On, Canada"],"affiliations":[{"raw_affiliation_string":"University of Toronto, Toronto, ON, Canada","institution_ids":["https://openalex.org/I185261750"]},{"raw_affiliation_string":"University of Toronto, Toronto, On, Canada","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5090184149","display_name":"Jonathan Rose","orcid":"https://orcid.org/0000-0002-3551-2175"},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Jonathan Rose","raw_affiliation_strings":["University of Toronto, Toronto, ON, Canada","University of Toronto, Toronto, On, Canada"],"affiliations":[{"raw_affiliation_string":"University of Toronto, Toronto, ON, Canada","institution_ids":["https://openalex.org/I185261750"]},{"raw_affiliation_string":"University of Toronto, Toronto, On, Canada","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5102812429","display_name":"Jason H. Anderson","orcid":"https://orcid.org/0000-0001-9083-6853"},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Jason Anderson","raw_affiliation_strings":["University of Toronto, Toronto, ON, Canada","University of Toronto, Toronto, On, Canada"],"affiliations":[{"raw_affiliation_string":"University of Toronto, Toronto, ON, Canada","institution_ids":["https://openalex.org/I185261750"]},{"raw_affiliation_string":"University of Toronto, Toronto, On, Canada","institution_ids":["https://openalex.org/I185261750"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5060132254"],"corresponding_institution_ids":["https://openalex.org/I185261750"],"apc_list":null,"apc_paid":null,"fwci":3.1924,"has_fulltext":false,"cited_by_count":30,"citation_normalized_percentile":{"value":0.92362227,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"21","last_page":"30"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.996999979019165,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.8249269723892212},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8001577854156494},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.5605716705322266},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.552959144115448},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.5267112851142883},{"id":"https://openalex.org/keywords/lookup-table","display_name":"Lookup table","score":0.47851741313934326},{"id":"https://openalex.org/keywords/path","display_name":"Path (computing)","score":0.4447670578956604},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4278066158294678},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.37597358226776123},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3311440646648407},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2897326946258545},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1220853328704834},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.09005305171012878}],"concepts":[{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.8249269723892212},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8001577854156494},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.5605716705322266},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.552959144115448},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.5267112851142883},{"id":"https://openalex.org/C134835016","wikidata":"https://www.wikidata.org/wiki/Q690265","display_name":"Lookup table","level":2,"score":0.47851741313934326},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.4447670578956604},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4278066158294678},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.37597358226776123},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3311440646648407},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2897326946258545},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1220853328704834},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.09005305171012878}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/2554688.2554783","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2554688.2554783","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.657.1937","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.657.1937","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://janders.eecg.toronto.edu/pdfs/p21-luu.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.5400000214576721}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1522950391","https://openalex.org/W1523051745","https://openalex.org/W2002641171","https://openalex.org/W2005602803","https://openalex.org/W2055251702","https://openalex.org/W2106290133","https://openalex.org/W2111756578","https://openalex.org/W2138383740","https://openalex.org/W2138515016","https://openalex.org/W2149239312","https://openalex.org/W2151614223","https://openalex.org/W2155316178","https://openalex.org/W2161640626","https://openalex.org/W2161942462","https://openalex.org/W2164340799","https://openalex.org/W2275304190","https://openalex.org/W2416121487","https://openalex.org/W2540066750"],"related_works":["https://openalex.org/W2058965144","https://openalex.org/W2164382479","https://openalex.org/W2146343568","https://openalex.org/W98480971","https://openalex.org/W2150291671","https://openalex.org/W2117300767","https://openalex.org/W2024574431","https://openalex.org/W2374017528","https://openalex.org/W4285503609","https://openalex.org/W2126248441"],"abstract_inverted_index":{"In":[0,246],"order":[1],"to":[2,13,17,34,84,120,130,178,233],"investigate":[3],"new":[4,22,91],"FPGA":[5,8],"logic":[6,95,253],"blocks,":[7],"architects":[9,56],"have":[10],"traditionally":[11],"needed":[12],"customize":[14],"CAD":[15,37,59,75,117],"tools":[16,38,60,76],"make":[18,86],"use":[19,87],"of":[20,26,52,88,93,113,134,182,187,194],"the":[21,48,89,94,110,114,192],"features":[23,92],"and":[24,50,146,161,180,223,241],"characteristics":[25],"those":[27],"blocks.":[28,137],"The":[29],"software":[30,67],"development":[31],"effort":[32],"necessary":[33],"create":[35,131],"such":[36],"can":[39,45,197],"be":[40,198],"a":[41,70,102,185,231],"time-consuming":[42],"process":[43],"that":[44,61,127,167,196],"significantly":[46],"limit":[47],"number":[49],"variety":[51],"architectures":[53,195,216,237,242],"explored.":[54,199],"Thus,":[55],"want":[57],"flexible":[58,74],"can,":[62],"with":[63,123,171,201,217,238,243,255],"few":[64],"or":[65],"no":[66],"modifications,":[68,174],"explore":[69],"diverse":[71],"space.":[72],"Existing":[73],"suffer":[77],"from":[78],"impractically":[79],"long":[80],"runtimes":[81],"and/or":[82],"fail":[83],"efficiently":[85,121],"important":[90],"blocks":[96,254],"being":[97],"investigated.":[98],"This":[99],"work":[100],"is":[101],"step":[103],"towards":[104],"addressing":[105],"these":[106,168],"concerns":[107],"by":[108],"enhancing":[109],"packing":[111,212,250],"stage":[112],"open-source":[115],"VTR":[116,202],"flow":[118],"[17]":[119],"deal":[122],"common":[124],"interconnect":[125],"structures":[126,139],"are":[128],"used":[129],"many":[132],"kinds":[133],"useful":[135],"novel":[136],"These":[138],"include":[140],"crossbars,":[141],"carry":[142,256],"chains,":[143],"dedicated":[144],"signals,":[145],"others.":[147],"To":[148],"accomplish":[149],"this,":[150],"we":[151,205,248],"employ":[152],"three":[153,172],"techniques":[154],"in":[155,176,211],"this":[156],"work:":[157],"speculative":[158],"packing,":[159],"pre-packing,":[160],"interconnect-aware":[162],"pin":[163],"counting.":[164],"We":[165,229],"show":[166,206],"techniques,":[169],"along":[170],"minor":[173],"result":[175],"improvements":[177],"runtime":[179],"quality":[181],"results":[183],"across":[184],"spectrum":[186],"architectures,":[188],"while":[189],"simultaneously":[190],"expanding":[191],"scope":[193],"Compared":[200],"1.0":[203],"[17],":[204],"an":[207],"average":[208],"12-fold":[209],"speedup":[210,235],"for":[213,236,252],"fracturable":[214],"LUT":[215],"20%":[218],"lower":[219,225],"minimum":[220],"channel":[221],"width":[222],"6%":[224],"critical":[226],"path":[227],"delay.":[228],"obtain":[230],"6":[232],"7-fold":[234],"non-fracturable":[239],"LUTs":[240],"depopulated":[244],"crossbars.":[245],"addition,":[247],"demonstrate":[249],"support":[251],"chains.":[257]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":5},{"year":2023,"cited_by_count":2},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":4},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":4},{"year":2014,"cited_by_count":4}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}