{"id":"https://openalex.org/W2005396308","doi":"https://doi.org/10.1145/2554688.2554689","title":"Using DSP blocks to compute CRC hash in FPGA (abstract only)","display_name":"Using DSP blocks to compute CRC hash in FPGA (abstract only)","publication_year":2014,"publication_date":"2014-02-18","ids":{"openalex":"https://openalex.org/W2005396308","doi":"https://doi.org/10.1145/2554688.2554689","mag":"2005396308"},"language":"en","primary_location":{"id":"doi:10.1145/2554688.2554689","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2554688.2554689","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5089906795","display_name":"Viktor Pu\u0161","orcid":null},"institutions":[{"id":"https://openalex.org/I54634078","display_name":"Czech Education and Scientific Network","ror":"https://ror.org/050dkka69","country_code":"CZ","type":"other","lineage":["https://openalex.org/I54634078"]}],"countries":["CZ"],"is_corresponding":true,"raw_author_name":"Viktor Pu\u0161","raw_affiliation_strings":["CESNET, Prague, Czech Rep","CESNET, Prague, Czech Rep#TAB#"],"affiliations":[{"raw_affiliation_string":"CESNET, Prague, Czech Rep","institution_ids":["https://openalex.org/I54634078"]},{"raw_affiliation_string":"CESNET, Prague, Czech Rep#TAB#","institution_ids":["https://openalex.org/I54634078"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076081443","display_name":"Luk\u00e1\u0161 Kekely","orcid":"https://orcid.org/0000-0001-8257-8129"},"institutions":[{"id":"https://openalex.org/I54634078","display_name":"Czech Education and Scientific Network","ror":"https://ror.org/050dkka69","country_code":"CZ","type":"other","lineage":["https://openalex.org/I54634078"]}],"countries":["CZ"],"is_corresponding":false,"raw_author_name":"Luk\u00e1\u0161 Kekely","raw_affiliation_strings":["CESNET, Prague, Czech Rep","CESNET, Prague, Czech Rep#TAB#"],"affiliations":[{"raw_affiliation_string":"CESNET, Prague, Czech Rep","institution_ids":["https://openalex.org/I54634078"]},{"raw_affiliation_string":"CESNET, Prague, Czech Rep#TAB#","institution_ids":["https://openalex.org/I54634078"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5067614736","display_name":"Tom\u00e1\u0161 Z\u00e1vodn\u00edk","orcid":null},"institutions":[{"id":"https://openalex.org/I54634078","display_name":"Czech Education and Scientific Network","ror":"https://ror.org/050dkka69","country_code":"CZ","type":"other","lineage":["https://openalex.org/I54634078"]}],"countries":["CZ"],"is_corresponding":false,"raw_author_name":"Tom\u00e1\u0161 Z\u00e1vodn\u00edk","raw_affiliation_strings":["CESNET, Prague, Czech Rep","CESNET, Prague, Czech Rep#TAB#"],"affiliations":[{"raw_affiliation_string":"CESNET, Prague, Czech Rep","institution_ids":["https://openalex.org/I54634078"]},{"raw_affiliation_string":"CESNET, Prague, Czech Rep#TAB#","institution_ids":["https://openalex.org/I54634078"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5089906795"],"corresponding_institution_ids":["https://openalex.org/I54634078"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.06849293,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"256","last_page":"256"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11269","display_name":"Algorithms and Data Compression","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11269","display_name":"Algorithms and Data Compression","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11241","display_name":"Advanced Malware Detection Techniques","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9905999898910522,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/hash-function","display_name":"Hash function","score":0.8306767344474792},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7922976016998291},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7728615999221802},{"id":"https://openalex.org/keywords/lookup-table","display_name":"Lookup table","score":0.7693873047828674},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.6191564798355103},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.5620999932289124},{"id":"https://openalex.org/keywords/secure-hash-algorithm","display_name":"Secure Hash Algorithm","score":0.5512382984161377},{"id":"https://openalex.org/keywords/heuristic","display_name":"Heuristic","score":0.5207816958427429},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5170891284942627},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.4832818806171417},{"id":"https://openalex.org/keywords/hash-table","display_name":"Hash table","score":0.47358447313308716},{"id":"https://openalex.org/keywords/double-hashing","display_name":"Double hashing","score":0.42643147706985474},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.32378944754600525},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.11177369952201843}],"concepts":[{"id":"https://openalex.org/C99138194","wikidata":"https://www.wikidata.org/wiki/Q183427","display_name":"Hash function","level":2,"score":0.8306767344474792},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7922976016998291},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7728615999221802},{"id":"https://openalex.org/C134835016","wikidata":"https://www.wikidata.org/wiki/Q690265","display_name":"Lookup table","level":2,"score":0.7693873047828674},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.6191564798355103},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.5620999932289124},{"id":"https://openalex.org/C9661340","wikidata":"https://www.wikidata.org/wiki/Q257799","display_name":"Secure Hash Algorithm","level":5,"score":0.5512382984161377},{"id":"https://openalex.org/C173801870","wikidata":"https://www.wikidata.org/wiki/Q201413","display_name":"Heuristic","level":2,"score":0.5207816958427429},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5170891284942627},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.4832818806171417},{"id":"https://openalex.org/C67388219","wikidata":"https://www.wikidata.org/wiki/Q207440","display_name":"Hash table","level":3,"score":0.47358447313308716},{"id":"https://openalex.org/C138111711","wikidata":"https://www.wikidata.org/wiki/Q478351","display_name":"Double hashing","level":4,"score":0.42643147706985474},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.32378944754600525},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.11177369952201843},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2554688.2554689","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2554688.2554689","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W100509257","https://openalex.org/W1566480155","https://openalex.org/W2090150216","https://openalex.org/W2141858013"],"related_works":["https://openalex.org/W2119251656","https://openalex.org/W113683524","https://openalex.org/W2614114970","https://openalex.org/W4210289650","https://openalex.org/W4241544584","https://openalex.org/W2976219018","https://openalex.org/W4387251676","https://openalex.org/W4251738463","https://openalex.org/W2011477251","https://openalex.org/W4387913918"],"abstract_inverted_index":{"Hash":[0],"table":[1,26],"and":[2,21,73,107],"its":[3],"variations":[4],"are":[5,70],"common":[6],"ways":[7],"to":[8,33,37,83,119,141],"implement":[9],"lookup":[10],"operations":[11,161,178],"in":[12,23,88,116],"FPGA.":[13,89],"The":[14,90],"process":[15],"of":[16,53,59,65,104,145,158],"adding":[17],"to,":[18],"deleting":[19],"from,":[20],"searching":[22],"the":[24,35,38,84,122,143,180,186],"hash":[25,31,42,86,98],"uses":[27],"one":[28,154],"or":[29],"more":[30],"functions":[32],"compute":[34],"address":[36],"table.":[39],"A":[40],"suitable":[41,93],"function":[43],"must":[44],"meet":[45],"statistical":[46],"properties":[47],"such":[48,96],"as":[49,97],"uniform":[50],"distribution,":[51],"use":[52,101,131],"all":[54,121],"input":[55],"bits,":[56],"large":[57],"change":[58,64],"output":[60],"based":[61,139],"on":[62],"small":[63],"input.":[66],"Other":[67],"desirable":[68],"parameters":[69],"high":[71,109],"throughput":[72],"low":[74],"FPGA":[75],"resources":[76],"usage.":[77],"We":[78,111,134],"propose":[79,135],"a":[80,136],"novel":[81],"approach":[82],"CRC":[85],"computation":[87],"method":[91],"is":[92],"for":[94],"applications":[95],"tables,":[99],"which":[100],"parallel":[102],"inputs":[103],"fixed":[105],"size":[106],"require":[108],"throughput.":[110],"employ":[112],"DSP":[113,146,155],"blocks":[114,147],"present":[115],"modern":[117],"FPGAs":[118],"perform":[120],"necessary":[123],"XOR":[124,160,177],"operations,":[125],"therefore":[126],"our":[127,173],"solution":[128,174,181],"does":[129],"not":[130],"any":[132],"LUTs.":[133,167],"Monte":[137],"Carlo":[138],"heuristic":[140],"reduce":[142],"number":[144],"required.":[148],"Our":[149,168],"experimental":[150],"results":[151,169],"show":[152,171],"that":[153,172],"block":[156],"capable":[157],"48":[159],"can":[162],"replace":[163],"around":[164],"eleven":[165],"6-input":[166],"further":[170],"performs":[175],"less":[176],"than":[179],"with":[182],"LUTs":[183],"optimized":[184],"by":[185],"synthesizer.":[187]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
