{"id":"https://openalex.org/W1981558913","doi":"https://doi.org/10.1145/2543749.2543751","title":"Reliability improvement of logic and clock paths in power-efficient designs","display_name":"Reliability improvement of logic and clock paths in power-efficient designs","publication_year":2014,"publication_date":"2014-01-01","ids":{"openalex":"https://openalex.org/W1981558913","doi":"https://doi.org/10.1145/2543749.2543751","mag":"1981558913"},"language":"en","primary_location":{"id":"doi:10.1145/2543749.2543751","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2543749.2543751","pdf_url":null,"source":{"id":"https://openalex.org/S96198239","display_name":"ACM Journal on Emerging Technologies in Computing Systems","issn_l":"1550-4832","issn":["1550-4832","1550-4840"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Journal on Emerging Technologies in Computing Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5109170308","display_name":"Senthil Arasu","orcid":null},"institutions":[{"id":"https://openalex.org/I162577319","display_name":"The University of Texas at Dallas","ror":"https://ror.org/049emcs32","country_code":"US","type":"education","lineage":["https://openalex.org/I162577319"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Senthil Arasu","raw_affiliation_strings":["University of Texas at Dallas, Richardson, TX","University of Texas at Dallas, Richardson, TX,"],"affiliations":[{"raw_affiliation_string":"University of Texas at Dallas, Richardson, TX","institution_ids":["https://openalex.org/I162577319"]},{"raw_affiliation_string":"University of Texas at Dallas, Richardson, TX,","institution_ids":["https://openalex.org/I162577319"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5040401289","display_name":"Mehrdad Nourani","orcid":"https://orcid.org/0000-0001-5077-4424"},"institutions":[{"id":"https://openalex.org/I162577319","display_name":"The University of Texas at Dallas","ror":"https://ror.org/049emcs32","country_code":"US","type":"education","lineage":["https://openalex.org/I162577319"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mehrdad Nourani","raw_affiliation_strings":["University of Texas at Dallas, Richardson, TX","University of Texas at Dallas, Richardson, TX,"],"affiliations":[{"raw_affiliation_string":"University of Texas at Dallas, Richardson, TX","institution_ids":["https://openalex.org/I162577319"]},{"raw_affiliation_string":"University of Texas at Dallas, Richardson, TX,","institution_ids":["https://openalex.org/I162577319"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050326051","display_name":"Vijay Reddy","orcid":"https://orcid.org/0000-0002-0687-672X"},"institutions":[{"id":"https://openalex.org/I74760111","display_name":"Texas Instruments (United States)","ror":"https://ror.org/03vsmv677","country_code":"US","type":"company","lineage":["https://openalex.org/I74760111"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Vijay Reddy","raw_affiliation_strings":["Texas Instruments Inc., Dallas, TX","texas Instruments Incorporated (Dallas, TX)"],"affiliations":[{"raw_affiliation_string":"Texas Instruments Inc., Dallas, TX","institution_ids":["https://openalex.org/I74760111"]},{"raw_affiliation_string":"texas Instruments Incorporated (Dallas, TX)","institution_ids":["https://openalex.org/I74760111"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039431688","display_name":"John M. Carulli","orcid":null},"institutions":[{"id":"https://openalex.org/I74760111","display_name":"Texas Instruments (United States)","ror":"https://ror.org/03vsmv677","country_code":"US","type":"company","lineage":["https://openalex.org/I74760111"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"John M. Carulli Jr.","raw_affiliation_strings":["Texas Instruments Inc., Dallas, TX","texas Instruments Incorporated (Dallas, TX)"],"affiliations":[{"raw_affiliation_string":"Texas Instruments Inc., Dallas, TX","institution_ids":["https://openalex.org/I74760111"]},{"raw_affiliation_string":"texas Instruments Incorporated (Dallas, TX)","institution_ids":["https://openalex.org/I74760111"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033039212","display_name":"G. Kapila","orcid":null},"institutions":[{"id":"https://openalex.org/I74760111","display_name":"Texas Instruments (United States)","ror":"https://ror.org/03vsmv677","country_code":"US","type":"company","lineage":["https://openalex.org/I74760111"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Gautam Kapila","raw_affiliation_strings":["Texas Instruments Inc., Dallas, TX","texas Instruments Incorporated (Dallas, TX)"],"affiliations":[{"raw_affiliation_string":"Texas Instruments Inc., Dallas, TX","institution_ids":["https://openalex.org/I74760111"]},{"raw_affiliation_string":"texas Instruments Incorporated (Dallas, TX)","institution_ids":["https://openalex.org/I74760111"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100337212","display_name":"Min Chen","orcid":"https://orcid.org/0000-0002-1759-0006"},"institutions":[{"id":"https://openalex.org/I74760111","display_name":"Texas Instruments (United States)","ror":"https://ror.org/03vsmv677","country_code":"US","type":"company","lineage":["https://openalex.org/I74760111"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Min Chen","raw_affiliation_strings":["Texas Instruments Inc., Dallas, TX","texas Instruments Incorporated (Dallas, TX)"],"affiliations":[{"raw_affiliation_string":"Texas Instruments Inc., Dallas, TX","institution_ids":["https://openalex.org/I74760111"]},{"raw_affiliation_string":"texas Instruments Incorporated (Dallas, TX)","institution_ids":["https://openalex.org/I74760111"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5109170308"],"corresponding_institution_ids":["https://openalex.org/I162577319"],"apc_list":null,"apc_paid":null,"fwci":0.4187,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.66014582,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"10","issue":"1","first_page":"1","last_page":"23"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/negative-bias-temperature-instability","display_name":"Negative-bias temperature instability","score":0.6273291110992432},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.517345130443573},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5143691301345825},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.5006561279296875},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.49581679701805115},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.48987123370170593},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.47550541162490845},{"id":"https://openalex.org/keywords/clock-skew","display_name":"Clock skew","score":0.46991103887557983},{"id":"https://openalex.org/keywords/critical-path-method","display_name":"Critical path method","score":0.4272877275943756},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.4271533191204071},{"id":"https://openalex.org/keywords/standard-cell","display_name":"Standard cell","score":0.4143141806125641},{"id":"https://openalex.org/keywords/context","display_name":"Context (archaeology)","score":0.4132421910762787},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.3663477301597595},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.34370583295822144},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.31841522455215454},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.2822524309158325},{"id":"https://openalex.org/keywords/mosfet","display_name":"MOSFET","score":0.2370513677597046},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2316911220550537},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.22512218356132507},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.16221898794174194},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.14509344100952148}],"concepts":[{"id":"https://openalex.org/C557185","wikidata":"https://www.wikidata.org/wiki/Q6987194","display_name":"Negative-bias temperature instability","level":5,"score":0.6273291110992432},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.517345130443573},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5143691301345825},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.5006561279296875},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.49581679701805115},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.48987123370170593},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.47550541162490845},{"id":"https://openalex.org/C60501442","wikidata":"https://www.wikidata.org/wiki/Q4382014","display_name":"Clock skew","level":4,"score":0.46991103887557983},{"id":"https://openalex.org/C115874739","wikidata":"https://www.wikidata.org/wiki/Q825377","display_name":"Critical path method","level":2,"score":0.4272877275943756},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.4271533191204071},{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.4143141806125641},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.4132421910762787},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.3663477301597595},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.34370583295822144},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.31841522455215454},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.2822524309158325},{"id":"https://openalex.org/C2778413303","wikidata":"https://www.wikidata.org/wiki/Q210793","display_name":"MOSFET","level":4,"score":0.2370513677597046},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2316911220550537},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.22512218356132507},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.16221898794174194},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.14509344100952148},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2543749.2543751","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2543749.2543751","pdf_url":null,"source":{"id":"https://openalex.org/S96198239","display_name":"ACM Journal on Emerging Technologies in Computing Systems","issn_l":"1550-4832","issn":["1550-4832","1550-4840"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Journal on Emerging Technologies in Computing Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320306087","display_name":"Semiconductor Research Corporation","ror":"https://ror.org/047z4n946"},{"id":"https://openalex.org/F4320307801","display_name":"Texas Instruments","ror":"https://ror.org/03vsmv677"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":35,"referenced_works":["https://openalex.org/W27170122","https://openalex.org/W93254854","https://openalex.org/W1602888171","https://openalex.org/W1969775801","https://openalex.org/W1986415905","https://openalex.org/W1990812782","https://openalex.org/W1991891926","https://openalex.org/W2024060531","https://openalex.org/W2046094701","https://openalex.org/W2067127687","https://openalex.org/W2068256473","https://openalex.org/W2072660350","https://openalex.org/W2083709430","https://openalex.org/W2097579272","https://openalex.org/W2102729267","https://openalex.org/W2105561360","https://openalex.org/W2112542663","https://openalex.org/W2113115586","https://openalex.org/W2122507955","https://openalex.org/W2122520074","https://openalex.org/W2132463129","https://openalex.org/W2134861486","https://openalex.org/W2135694842","https://openalex.org/W2135748666","https://openalex.org/W2136500761","https://openalex.org/W2137706187","https://openalex.org/W2154112205","https://openalex.org/W2167724032","https://openalex.org/W2170927643","https://openalex.org/W2542616127","https://openalex.org/W2543567411","https://openalex.org/W2592221892","https://openalex.org/W4233580825","https://openalex.org/W4245753197","https://openalex.org/W4247470388"],"related_works":["https://openalex.org/W2020916702","https://openalex.org/W1992148151","https://openalex.org/W2075934899","https://openalex.org/W1482327664","https://openalex.org/W2314747031","https://openalex.org/W2156064231","https://openalex.org/W4233474994","https://openalex.org/W2149622198","https://openalex.org/W1982822282","https://openalex.org/W1981558913"],"abstract_inverted_index":{"Performance":[0],"degradation":[1,64,91,229],"due":[2,14,65,92,207,230],"to":[3,10,15,66,85,93,128,146,149,166,174,198,208,213,224,226,231],"transistor":[4,57],"aging":[5,55,67,201,233],"is":[6,41,58,98,144,172,196,222],"a":[7,115],"significant":[8],"impediment":[9],"high-performance":[11],"IC":[12],"design":[13,126,179],"increasing":[16],"concerns":[17],"of":[18,35,52,56,63,108],"reliability":[19,106],"mechanisms":[20],"such":[21],"as":[22,32],"negative-bias-temperature-instability":[23],"(NBTI).":[24],"The":[25,140,170],"concern":[26],"only":[27],"grows":[28],"with":[29,49,124,215,235],"technology":[30],"scaling":[31],"the":[33,50,61,71,78,105,130,178,200],"effects":[34,51],"positive":[36],"bias":[37],"temperature":[38],"instability":[39],"(PBTI)":[40],"becoming":[42],"prominent":[43],"in":[44,74,89,122,137,203],"future":[45],"technologies":[46],"and":[47,60,80,113,152,156,192,218,234],"compounding":[48],"NBTI.":[53],"Although":[54],"inevitable":[59],"magnitude":[62],"varies":[68],"depending":[69],"upon":[70],"context.":[72],"Specifically,":[73],"power-efficient":[75],"systems":[76,110],"designs,":[77],"logic":[79,151,204],"clock":[81,97,153],"paths":[82,154],"are":[83],"susceptible":[84],"static":[86,161,209,232],"stress":[87,131,162,210],"resulting":[88],"peak":[90],"BTI":[94],"occurrence":[95],"when":[96],"gated.":[99],"In":[100],"this":[101],"article,":[102],"we":[103],"present":[104],"impact":[107],"making":[109],"power":[111,219],"efficient":[112],"propose":[114],"design-for-reliability":[116],"methodology":[117],"that":[118],"can":[119],"be":[120,147],"used":[121],"conjunction":[123],"low-power":[125],"techniques":[127],"alleviate":[129],"conditions":[132],"caused":[133],"by":[134,211],"rendering":[135],"circuits":[136],"idle":[138],"state.":[139],"technique\u2014":[141],"BTI-Refresh":[142,221],",":[143],"shown":[145,173,197],"applicable":[148],"both":[150],"alike":[155],"focuses":[157],"on":[158],"preventing":[159],"prolonged":[160],"using":[163],"periodic":[164],"refreshes":[165],"achieve":[167],"alternating":[168],"stress.":[169],"mechanism":[171],"integrate":[175],"seamlessly":[176],"into":[177],"at":[180],"gate-level":[181],"without":[182],"requiring":[183],"any":[184],"architectural":[185],"or":[186],"RT-level":[187],"changes.":[188],"Using":[189],"ISCAS":[190],"benchmarks":[191],"Kogge-Stone-Adder":[193],"circuits,":[194],"it":[195],"reduce":[199],"effect":[202],"path":[205],"delay":[206],"up":[212],"50%":[214],"negligible":[216],"area":[217],"overhead.":[220],"extended":[223],"clock-paths":[225],"prevent":[227],"pulse-width":[228],"minimal":[236],"clock-skew.":[237]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}