{"id":"https://openalex.org/W2050419810","doi":"https://doi.org/10.1145/2541228.2541233","title":"The design and implementation of heterogeneous multicore systems for energy-efficient speculative thread execution","display_name":"The design and implementation of heterogeneous multicore systems for energy-efficient speculative thread execution","publication_year":2013,"publication_date":"2013-12-01","ids":{"openalex":"https://openalex.org/W2050419810","doi":"https://doi.org/10.1145/2541228.2541233","mag":"2050419810"},"language":"en","primary_location":{"id":"doi:10.1145/2541228.2541233","is_oa":true,"landing_page_url":"https://doi.org/10.1145/2541228.2541233","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/2541228.2541233","source":{"id":"https://openalex.org/S26056741","display_name":"ACM Transactions on Architecture and Code Optimization","issn_l":"1544-3566","issn":["1544-3566","1544-3973"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Architecture and Code Optimization","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"bronze","oa_url":"https://dl.acm.org/doi/pdf/10.1145/2541228.2541233","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5036219025","display_name":"Yangchun Luo","orcid":null},"institutions":[{"id":"https://openalex.org/I1311921367","display_name":"Advanced Micro Devices (Canada)","ror":"https://ror.org/02yh0k313","country_code":"CA","type":"company","lineage":["https://openalex.org/I1311921367","https://openalex.org/I4210137977"]},{"id":"https://openalex.org/I4210137977","display_name":"Advanced Micro Devices (United States)","ror":"https://ror.org/04kd6c783","country_code":"US","type":"company","lineage":["https://openalex.org/I4210137977"]}],"countries":["CA","US"],"is_corresponding":true,"raw_author_name":"Yangchun Luo","raw_affiliation_strings":["Advanced Micro Devices Inc., Sunnyvale, CA","ADVANCED MICRO DEVICES, INC. (Sunnyvale, CA)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Advanced Micro Devices Inc., Sunnyvale, CA","institution_ids":["https://openalex.org/I4210137977"]},{"raw_affiliation_string":"ADVANCED MICRO DEVICES, INC. (Sunnyvale, CA)","institution_ids":["https://openalex.org/I1311921367"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017207899","display_name":"Wei\u2010Chung Hsu","orcid":"https://orcid.org/0000-0002-0833-7981"},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Wei-Chung Hsu","raw_affiliation_strings":["National Chiao Tung University, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Chiao Tung University, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5053597061","display_name":"Antonia Zhai","orcid":"https://orcid.org/0000-0002-8921-1415"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]},{"id":"https://openalex.org/I4210101327","display_name":"Twin Cities Orthopedics","ror":"https://ror.org/01en4s460","country_code":"US","type":"healthcare","lineage":["https://openalex.org/I4210101327"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Antonia Zhai","raw_affiliation_strings":["University of Minnesota, Twin Cities"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Minnesota, Twin Cities","institution_ids":["https://openalex.org/I4210101327","https://openalex.org/I130238516"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5036219025"],"corresponding_institution_ids":["https://openalex.org/I1311921367","https://openalex.org/I4210137977"],"apc_list":null,"apc_paid":null,"fwci":1.2684,"has_fulltext":true,"cited_by_count":4,"citation_normalized_percentile":{"value":0.80439276,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"10","issue":"4","first_page":"1","last_page":"29"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8593822121620178},{"id":"https://openalex.org/keywords/uniprocessor-system","display_name":"Uniprocessor system","score":0.7792962789535522},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.7028235197067261},{"id":"https://openalex.org/keywords/thread","display_name":"Thread (computing)","score":0.6267282962799072},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5777566432952881},{"id":"https://openalex.org/keywords/context-switch","display_name":"Context switch","score":0.5676616430282593},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.565147340297699},{"id":"https://openalex.org/keywords/spec#","display_name":"Spec#","score":0.5437335968017578},{"id":"https://openalex.org/keywords/energy-consumption","display_name":"Energy consumption","score":0.5311093926429749},{"id":"https://openalex.org/keywords/speculative-multithreading","display_name":"Speculative multithreading","score":0.5033053755760193},{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.48247030377388},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4698098301887512},{"id":"https://openalex.org/keywords/simultaneous-multithreading","display_name":"Simultaneous multithreading","score":0.4576908051967621},{"id":"https://openalex.org/keywords/multithreading","display_name":"Multithreading","score":0.4455839693546295},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.4417334496974945},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.4257432818412781},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.41670462489128113},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.24307242035865784},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2170129418373108}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8593822121620178},{"id":"https://openalex.org/C79189994","wikidata":"https://www.wikidata.org/wiki/Q3488021","display_name":"Uniprocessor system","level":3,"score":0.7792962789535522},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.7028235197067261},{"id":"https://openalex.org/C138101251","wikidata":"https://www.wikidata.org/wiki/Q213092","display_name":"Thread (computing)","level":2,"score":0.6267282962799072},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5777566432952881},{"id":"https://openalex.org/C53833338","wikidata":"https://www.wikidata.org/wiki/Q1061424","display_name":"Context switch","level":2,"score":0.5676616430282593},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.565147340297699},{"id":"https://openalex.org/C2778565505","wikidata":"https://www.wikidata.org/wiki/Q2207566","display_name":"Spec#","level":2,"score":0.5437335968017578},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.5311093926429749},{"id":"https://openalex.org/C15296174","wikidata":"https://www.wikidata.org/wiki/Q7575343","display_name":"Speculative multithreading","level":4,"score":0.5033053755760193},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.48247030377388},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4698098301887512},{"id":"https://openalex.org/C85717602","wikidata":"https://www.wikidata.org/wiki/Q82178","display_name":"Simultaneous multithreading","level":4,"score":0.4576908051967621},{"id":"https://openalex.org/C201410400","wikidata":"https://www.wikidata.org/wiki/Q1064412","display_name":"Multithreading","level":3,"score":0.4455839693546295},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.4417334496974945},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.4257432818412781},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.41670462489128113},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.24307242035865784},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2170129418373108},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C18903297","wikidata":"https://www.wikidata.org/wiki/Q7150","display_name":"Ecology","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2541228.2541233","is_oa":true,"landing_page_url":"https://doi.org/10.1145/2541228.2541233","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/2541228.2541233","source":{"id":"https://openalex.org/S26056741","display_name":"ACM Transactions on Architecture and Code Optimization","issn_l":"1544-3566","issn":["1544-3566","1544-3973"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Architecture and Code Optimization","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1145/2541228.2541233","is_oa":true,"landing_page_url":"https://doi.org/10.1145/2541228.2541233","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/2541228.2541233","source":{"id":"https://openalex.org/S26056741","display_name":"ACM Transactions on Architecture and Code Optimization","issn_l":"1544-3566","issn":["1544-3566","1544-3973"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Architecture and Code Optimization","raw_type":"journal-article"},"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8899999856948853}],"awards":[{"id":"https://openalex.org/G1798822627","display_name":"CPS: Medium: Embedded Fault Detection for Low-Cost, Safety-Critical  Systems","funder_award_id":"0931931","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G6012535679","display_name":"SHF: Small: In Vivo Software Monitoring: Architectural and Compiler Support","funder_award_id":"0916583","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G7630411954","display_name":null,"funder_award_id":"CCF-0916583","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320306087","display_name":"Semiconductor Research Corporation","ror":"https://ror.org/047z4n946"},{"id":"https://openalex.org/F4320307762","display_name":"International Business Machines Corporation","ror":"https://ror.org/05hh8d621"},{"id":"https://openalex.org/F4320337387","display_name":"Division of Computing and Communication Foundations","ror":"https://ror.org/01mng8331"},{"id":"https://openalex.org/F4320337388","display_name":"Division of Computer and Network Systems","ror":"https://ror.org/02rdzmk74"}],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2050419810.pdf","grobid_xml":"https://content.openalex.org/works/W2050419810.grobid-xml"},"referenced_works_count":47,"referenced_works":["https://openalex.org/W1869745331","https://openalex.org/W1963560066","https://openalex.org/W1974831646","https://openalex.org/W1979593478","https://openalex.org/W1987003477","https://openalex.org/W2008451057","https://openalex.org/W2023128081","https://openalex.org/W2037462607","https://openalex.org/W2076958750","https://openalex.org/W2093597477","https://openalex.org/W2095703459","https://openalex.org/W2097346625","https://openalex.org/W2098540801","https://openalex.org/W2099708455","https://openalex.org/W2101366948","https://openalex.org/W2102387714","https://openalex.org/W2102727118","https://openalex.org/W2103670614","https://openalex.org/W2105876415","https://openalex.org/W2106018697","https://openalex.org/W2111594375","https://openalex.org/W2112085716","https://openalex.org/W2115412309","https://openalex.org/W2118532220","https://openalex.org/W2119556945","https://openalex.org/W2122545654","https://openalex.org/W2125340270","https://openalex.org/W2129056376","https://openalex.org/W2130327500","https://openalex.org/W2134241943","https://openalex.org/W2134633067","https://openalex.org/W2137055485","https://openalex.org/W2146561901","https://openalex.org/W2147943147","https://openalex.org/W2149813938","https://openalex.org/W2157920577","https://openalex.org/W2159025940","https://openalex.org/W2160801071","https://openalex.org/W2165080711","https://openalex.org/W2165856991","https://openalex.org/W2171607039","https://openalex.org/W2187874404","https://openalex.org/W2296006986","https://openalex.org/W4232293661","https://openalex.org/W4239813889","https://openalex.org/W4255681033","https://openalex.org/W4285719527"],"related_works":["https://openalex.org/W2460577634","https://openalex.org/W2093396203","https://openalex.org/W4385485417","https://openalex.org/W3133574067","https://openalex.org/W2013290259","https://openalex.org/W4251787943","https://openalex.org/W4251281865","https://openalex.org/W4255445740","https://openalex.org/W4288104113","https://openalex.org/W2165495955"],"abstract_inverted_index":{"With":[0],"the":[1,21,27,46,118,123,143,162,179],"emergence":[2],"of":[3,20,30,48,93,151],"multicore":[4,58,87],"processors,":[5],"various":[6],"aggressive":[7,28],"execution":[8,32,42,116],"models":[9,33],"have":[10],"been":[11],"proposed":[12,144],"to":[13,36,41,109,161,178],"exploit":[14],"fine-grained":[15],"thread-level":[16],"parallelism,":[17],"taking":[18],"advantage":[19],"fast":[22],"on-chip":[23,64],"interconnection":[24],"communication.":[25],"However,":[26],"nature":[29],"these":[31],"often":[34],"leads":[35],"excessive":[37],"energy":[38,194],"consumption":[39,195],"incommensurate":[40],"time":[43],"reduction.":[44],"In":[45],"context":[47],"Thread-Level":[49],"Speculation,":[50],"we":[51,84,105,168,187],"demonstrated":[52],"that":[53,89,133],"on":[54],"a":[55,79,86,128,148,200],"same-ISA":[56],"heterogeneous":[57,91,145],"system,":[59],"by":[60,190,196],"dynamically":[61],"deciding":[62],"how":[63],"resources":[65],"are":[66],"utilized,":[67],"speculative":[68],"threads":[69],"can":[70],"achieve":[71],"performance":[72,171,189],"gain":[73],"in":[74,203],"an":[75],"energy-efficient":[76,120],"way.":[77],"Through":[78],"systematic":[80],"design":[81],"space":[82],"exploration,":[83],"built":[85],"architecture":[88],"integrates":[90],"components":[92],"processing":[94],"cores":[95],"and":[96,157,192],"first-level":[97],"caches.":[98],"To":[99,113],"cope":[100],"with":[101,117,127,147],"processor":[102,121,139],"reconfiguration":[103],"overheads,":[104],"introduced":[106],"runtime":[107],"mechanisms":[108],"mitigate":[110],"their":[111],"impacts.":[112],"match":[114],"program":[115,135],"most":[119,163,180],"configuration,":[122],"system":[124,146],"was":[125],"equipped":[126],"dynamic":[129],"resource":[130],"allocation":[131],"scheme":[132],"characterizes":[134],"behaviors":[136],"using":[137],"novel":[138],"counters.":[140],"We":[141],"evaluated":[142],"diverse":[149],"set":[150],"benchmark":[152],"programs":[153],"from":[154],"SPEC":[155],"CPU2000":[156],"CPU20006":[158],"suites.":[159],"Compared":[160,177],"efficient":[164,181],"homogeneous":[165,182],"TLS":[166],"implementation,":[167],"achieved":[169],"similar":[170],"but":[172],"consumed":[173],"18%":[174],"less":[175],"energy.":[176],"uniprocessor":[183],"running":[184],"sequential":[185],"programs,":[186],"improved":[188],"29%":[191],"reduced":[193],"3.6%,":[197],"which":[198],"is":[199],"42%":[201],"improvement":[202],"energy-delay-squared":[204],"product.":[205]},"counts_by_year":[{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":1}],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}