{"id":"https://openalex.org/W2045528155","doi":"https://doi.org/10.1145/2491246.2491251","title":"Simplifying FPGA design with a novel network-on-chip architecture","display_name":"Simplifying FPGA design with a novel network-on-chip architecture","publication_year":2013,"publication_date":"2013-08-12","ids":{"openalex":"https://openalex.org/W2045528155","doi":"https://doi.org/10.1145/2491246.2491251","mag":"2045528155"},"language":"en","primary_location":{"id":"doi:10.1145/2491246.2491251","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2491246.2491251","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the second workshop on Software radio implementation forum","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5031743330","display_name":"John Malsbury","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"John Malsbury","raw_affiliation_strings":["Ettus Research, Mountain View, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Ettus Research, Mountain View, CA, USA","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5074321643","display_name":"Matt Ettus","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Matt Ettus","raw_affiliation_strings":["Ettus Research, Mountain View, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Ettus Research, Mountain View, CA, USA","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5031743330"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.2627,"has_fulltext":false,"cited_by_count":17,"citation_normalized_percentile":{"value":0.89228897,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"45","last_page":"52"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8410964012145996},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7970675230026245},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.7223977446556091},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.6985901594161987},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6168823838233948},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.5461592674255371},{"id":"https://openalex.org/keywords/software-defined-radio","display_name":"Software-defined radio","score":0.4873703122138977},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.4873214662075043},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.4829680025577545},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.4654558300971985},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.4581410586833954},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.4466113746166229},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.44466084241867065},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.4255497455596924},{"id":"https://openalex.org/keywords/fpga-prototype","display_name":"FPGA prototype","score":0.4205728769302368},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10772642493247986},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.08426326513290405}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8410964012145996},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7970675230026245},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.7223977446556091},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.6985901594161987},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6168823838233948},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.5461592674255371},{"id":"https://openalex.org/C171115542","wikidata":"https://www.wikidata.org/wiki/Q1331892","display_name":"Software-defined radio","level":2,"score":0.4873703122138977},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.4873214662075043},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.4829680025577545},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.4654558300971985},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.4581410586833954},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.4466113746166229},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.44466084241867065},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.4255497455596924},{"id":"https://openalex.org/C203864433","wikidata":"https://www.wikidata.org/wiki/Q5426992","display_name":"FPGA prototype","level":3,"score":0.4205728769302368},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10772642493247986},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.08426326513290405},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/2491246.2491251","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2491246.2491251","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the second workshop on Software radio implementation forum","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.464.5335","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.464.5335","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://conferences.sigcomm.org/sigcomm/2013/papers/srif/p45.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.46000000834465027,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":1,"referenced_works":["https://openalex.org/W2507959128"],"related_works":["https://openalex.org/W2135981148","https://openalex.org/W2388672758","https://openalex.org/W2065289416","https://openalex.org/W2754086592","https://openalex.org/W2144357574","https://openalex.org/W4230458348","https://openalex.org/W3198758847","https://openalex.org/W1966325333","https://openalex.org/W2108200233","https://openalex.org/W1581055755"],"abstract_inverted_index":{"As":[0],"wireless":[1],"communications":[2],"continue":[3],"to":[4,11,30,41,82],"evolve,":[5],"complex":[6],"new":[7],"standards":[8],"force":[9],"researchers":[10],"adopt":[12],"heterogeneous":[13],"design":[14],"approaches":[15],"that":[16,103],"include":[17],"general":[18],"purpose":[19],"processors":[20,92],"(GPP)":[21],"and":[22,36,65,116],"field-programmable":[23],"gate":[24],"arrays":[25],"(FPGA).":[26],"This":[27,78,110],"combination":[28],"leads":[29],"increased":[31,37],"processing":[32,64,106],"throughput,":[33],"decreased":[34],"latency,":[35],"development":[38,76,121],"complexity.":[39],"Compared":[40],"GPP":[42],"implementations,":[43],"custom":[44,85],"FPGA":[45,75],"designs":[46,102],"are":[47],"time-consuming.":[48],"The":[49,96],"Third-Generation":[50],"Ettus":[51],"Research":[52],"USRPTM":[53],"(Universal":[54],"Software":[55],"Radio":[56],"Peripheral)":[57],"has":[58],"been":[59],"developed":[60],"with":[61],"a":[62],"unique":[63],"routing":[66],"architecture":[67,79,97,115],"based":[68],"on":[69],"VITA-49,":[70],"which":[71],"can":[72,104],"drastically":[73],"reduce":[74,120],"time.":[77],"allows":[80],"users":[81],"easily":[83],"integrate":[84],"IP,":[86],"such":[87],"as":[88],"channelizes,":[89],"modulators,":[90],"demodulators,":[91],"or":[93],"protocol":[94],"stacks.":[95],"will":[98,112,119,128],"also":[99,129],"permit":[100],"scalable":[101],"distribute":[105],"across":[107],"many":[108],"nodes.":[109],"paper":[111],"examine":[113],"this":[114],"how":[117],"it":[118],"time":[122],"for":[123,132],"researchers.":[124],"A":[125],"practical":[126],"example":[127],"be":[130],"provided":[131],"reference.":[133]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2017,"cited_by_count":5},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":2}],"updated_date":"2026-05-06T08:25:59.206177","created_date":"2025-10-10T00:00:00"}
