{"id":"https://openalex.org/W2083513885","doi":"https://doi.org/10.1145/2490302.2490305","title":"Performance analysis of a FPGA based novel binary and DBNS multiplier","display_name":"Performance analysis of a FPGA based novel binary and DBNS multiplier","publication_year":2013,"publication_date":"2013-05-29","ids":{"openalex":"https://openalex.org/W2083513885","doi":"https://doi.org/10.1145/2490302.2490305","mag":"2083513885"},"language":"en","primary_location":{"id":"doi:10.1145/2490302.2490305","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2490302.2490305","pdf_url":null,"source":{"id":"https://openalex.org/S4210193905","display_name":"ACM SIGARCH Computer Architecture News","issn_l":"0163-5964","issn":["0163-5964","1943-5851"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320740","host_organization_name":"ACM SIGARCH","host_organization_lineage":["https://openalex.org/P4310320740"],"host_organization_lineage_names":["ACM SIGARCH"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM SIGARCH Computer Architecture News","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103629112","display_name":"Amrita Saha","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Amrita Saha","raw_affiliation_strings":[""],"affiliations":[{"raw_affiliation_string":"","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054758446","display_name":"Manideepa Mukherjee","orcid":"https://orcid.org/0000-0002-2391-5989"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Manideepa Mukherjee","raw_affiliation_strings":[""],"affiliations":[{"raw_affiliation_string":"","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5014956317","display_name":"Debanjana Datta","orcid":"https://orcid.org/0000-0002-1246-2283"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Debanjana Datta","raw_affiliation_strings":[""],"affiliations":[{"raw_affiliation_string":"","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002625347","display_name":"Sangita Saha","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Sangita Saha","raw_affiliation_strings":[""],"affiliations":[{"raw_affiliation_string":"","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5103229333","display_name":"Amitabha Sinha","orcid":"https://orcid.org/0000-0002-2179-209X"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Amitabha Sinha","raw_affiliation_strings":[""],"affiliations":[{"raw_affiliation_string":"","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5103629112"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.1287253,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"41","issue":"2","first_page":"9","last_page":"16"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8167972564697266},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7599766850471497},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5694470405578613},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5669984221458435},{"id":"https://openalex.org/keywords/software-defined-radio","display_name":"Software-defined radio","score":0.5555875897407532},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.5261561274528503},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.5008647441864014},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.5005629062652588},{"id":"https://openalex.org/keywords/virtex","display_name":"Virtex","score":0.4758205711841583},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.46178939938545227},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.4526618719100952},{"id":"https://openalex.org/keywords/demodulation","display_name":"Demodulation","score":0.43788713216781616},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.43663471937179565},{"id":"https://openalex.org/keywords/binary-number","display_name":"Binary number","score":0.4336031675338745},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.43347036838531494},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.16412007808685303},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.10346511006355286},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08407256007194519}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8167972564697266},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7599766850471497},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5694470405578613},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5669984221458435},{"id":"https://openalex.org/C171115542","wikidata":"https://www.wikidata.org/wiki/Q1331892","display_name":"Software-defined radio","level":2,"score":0.5555875897407532},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.5261561274528503},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.5008647441864014},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.5005629062652588},{"id":"https://openalex.org/C2777674469","wikidata":"https://www.wikidata.org/wiki/Q20741011","display_name":"Virtex","level":3,"score":0.4758205711841583},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.46178939938545227},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.4526618719100952},{"id":"https://openalex.org/C195251586","wikidata":"https://www.wikidata.org/wiki/Q1185939","display_name":"Demodulation","level":3,"score":0.43788713216781616},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.43663471937179565},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.4336031675338745},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.43347036838531494},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.16412007808685303},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.10346511006355286},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08407256007194519},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2490302.2490305","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2490302.2490305","pdf_url":null,"source":{"id":"https://openalex.org/S4210193905","display_name":"ACM SIGARCH Computer Architecture News","issn_l":"0163-5964","issn":["0163-5964","1943-5851"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320740","host_organization_name":"ACM SIGARCH","host_organization_lineage":["https://openalex.org/P4310320740"],"host_organization_lineage_names":["ACM SIGARCH"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM SIGARCH Computer Architecture News","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.4399999976158142,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W1561134545","https://openalex.org/W1573955341","https://openalex.org/W1586616317","https://openalex.org/W1678449713","https://openalex.org/W2068446876","https://openalex.org/W2075158086","https://openalex.org/W2081231622","https://openalex.org/W2093616902","https://openalex.org/W2094274063","https://openalex.org/W2097639620","https://openalex.org/W2113237612","https://openalex.org/W2117536689","https://openalex.org/W2142080379","https://openalex.org/W2143231195","https://openalex.org/W2143826576","https://openalex.org/W2158358966","https://openalex.org/W2168078104","https://openalex.org/W2294213629","https://openalex.org/W4235950841"],"related_works":["https://openalex.org/W2381869796","https://openalex.org/W2361654132","https://openalex.org/W561296367","https://openalex.org/W282684715","https://openalex.org/W2930684676","https://openalex.org/W2359570116","https://openalex.org/W2368050142","https://openalex.org/W2011469574","https://openalex.org/W2913355112","https://openalex.org/W2473740624"],"abstract_inverted_index":{"Designing":[0],"high":[1,18,52],"performance":[2,19,53,111,138,165,188],"Software":[3,159],"Defined":[4],"Radio":[5],"(SDR)":[6],"with":[7,107,193],"low":[8],"power":[9],"and":[10,80,112,144,179,185,199],"flexibility":[11,113],"is":[12,72],"a":[13,157],"major":[14],"challenge.":[15],"While":[16],"the":[17,26,101,164,167],"DSP":[20],"processors":[21],"are":[22,36,87],"unable":[23],"to":[24,56,73,109,115,155],"meet":[25],"speed":[27],"requirements":[28],"of":[29,41,69,103,135,166],"these":[30,148],"SDRs,":[31],"System":[32],"on":[33,187,205],"chips":[34],"(SOCs)":[35],"also":[37,190],"not":[38],"suitable":[39],"because":[40,134],"their":[42,136],"limited":[43],"flexibility.":[44],"Recently":[45],"dynamically":[46],"reconfigurable":[47],"FPGAs":[48,91],"have":[49,92,123,172,189],"emerged":[50],"as":[51],"programmable":[54],"hardware":[55],"execute":[57],"highly":[58],"parallel,":[59],"computationally":[60],"intensive":[61,129],"signal":[62,88,132],"processing":[63,89,133],"functions":[64],"efficiently.":[65],"Since":[66],"basic":[67,81],"intention":[68],"an":[70,94,105],"SDR":[71],"implement":[74],"different":[75],"modulation":[76],"/":[77],"demodulation":[78],"schemes":[79,86],"building":[82],"blocks":[83],"for":[84,97,127],"such":[85,104],"functions,":[90],"become":[93],"important":[95],"component":[96],"implementing":[98],"these.":[99],"However,":[100],"effectiveness":[102],"approach":[106],"respect":[108],"cost,":[110],"need":[114],"be":[116],"examined.":[117],"Double":[118],"Base":[119],"Number":[120],"Systems":[121],"(DBNS)":[122],"been":[124,173,191],"gaining":[125],"attention":[126],"compute":[128],"applications":[130],"in":[131,139,142,150],"higher":[137],"arithmetic":[140],"operations":[141],"general":[143],"particularly":[145],"multiplication.":[146],"Keeping":[147],"issues":[149],"view,":[151],"this":[152],"paper":[153],"aims":[154],"present":[156],"new":[158],"defined":[160],"Radio.":[161],"To":[162],"Enhance":[163],"proposed":[168],"architecture":[169,202],",":[170],"analysis":[171,186],"done":[174,192],"employing":[175],"both":[176],"single":[177],"index":[178],"multiple":[180],"indices":[181],"DBNS":[182,198],"multipliers.":[183],"Experiments":[184],"its":[194],"binary":[195,200],"counterpart.":[196],"Both":[197],"based":[201],"were":[203],"implemented":[204],"Xilinx":[206],"virtex":[207],"iv":[208],"FPGA":[209],"using":[210],"xilinx":[211],"ISE":[212],"9.1":[213],"i.":[214]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}