{"id":"https://openalex.org/W2001585562","doi":"https://doi.org/10.1145/2483028.2483117","title":"Low power 3-D stacking multimedia platform with reconfigurable memory architecture","display_name":"Low power 3-D stacking multimedia platform with reconfigurable memory architecture","publication_year":2013,"publication_date":"2013-05-02","ids":{"openalex":"https://openalex.org/W2001585562","doi":"https://doi.org/10.1145/2483028.2483117","mag":"2001585562"},"language":"en","primary_location":{"id":"doi:10.1145/2483028.2483117","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2483028.2483117","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 23rd ACM international conference on Great lakes symposium on VLSI","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084633263","display_name":"Po\u2010Han Huang","orcid":"https://orcid.org/0000-0001-7243-0788"},"institutions":[{"id":"https://openalex.org/I4210148468","display_name":"Industrial Technology Research Institute","ror":"https://ror.org/05szzwt63","country_code":"TW","type":"nonprofit","lineage":["https://openalex.org/I4210148468"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Po-Han Huang","raw_affiliation_strings":["Industrial Technology Research Institute, Hsinchu, Taiwan Roc","Industrial Technology Research Institute, Hsinchu, Taiwan ROC"],"affiliations":[{"raw_affiliation_string":"Industrial Technology Research Institute, Hsinchu, Taiwan Roc","institution_ids":["https://openalex.org/I4210148468"]},{"raw_affiliation_string":"Industrial Technology Research Institute, Hsinchu, Taiwan ROC","institution_ids":["https://openalex.org/I4210148468"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5090183558","display_name":"Huang-Lun Lin","orcid":null},"institutions":[{"id":"https://openalex.org/I4210148468","display_name":"Industrial Technology Research Institute","ror":"https://ror.org/05szzwt63","country_code":"TW","type":"nonprofit","lineage":["https://openalex.org/I4210148468"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Huang-Lun Lin","raw_affiliation_strings":["Industrial Technology Research Institute, Hsinchu, Taiwan Roc","Industrial Technology Research Institute, Hsinchu, Taiwan ROC"],"affiliations":[{"raw_affiliation_string":"Industrial Technology Research Institute, Hsinchu, Taiwan Roc","institution_ids":["https://openalex.org/I4210148468"]},{"raw_affiliation_string":"Industrial Technology Research Institute, Hsinchu, Taiwan ROC","institution_ids":["https://openalex.org/I4210148468"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111829321","display_name":"Hsien-Ching Hsieh","orcid":null},"institutions":[{"id":"https://openalex.org/I4210148468","display_name":"Industrial Technology Research Institute","ror":"https://ror.org/05szzwt63","country_code":"TW","type":"nonprofit","lineage":["https://openalex.org/I4210148468"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Hsien-Ching Hsieh","raw_affiliation_strings":["Industrial Technology Research Institute, Hsinchu, Taiwan Roc","Industrial Technology Research Institute, Hsinchu, Taiwan ROC"],"affiliations":[{"raw_affiliation_string":"Industrial Technology Research Institute, Hsinchu, Taiwan Roc","institution_ids":["https://openalex.org/I4210148468"]},{"raw_affiliation_string":"Industrial Technology Research Institute, Hsinchu, Taiwan ROC","institution_ids":["https://openalex.org/I4210148468"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102822708","display_name":"Chi\u2010Hung Lin","orcid":"https://orcid.org/0000-0003-1911-0034"},"institutions":[{"id":"https://openalex.org/I4210148468","display_name":"Industrial Technology Research Institute","ror":"https://ror.org/05szzwt63","country_code":"TW","type":"nonprofit","lineage":["https://openalex.org/I4210148468"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chi-Hung Lin","raw_affiliation_strings":["Industrial Technology Research Institute, Hsinchu, Taiwan Roc","Industrial Technology Research Institute, Hsinchu, Taiwan ROC"],"affiliations":[{"raw_affiliation_string":"Industrial Technology Research Institute, Hsinchu, Taiwan Roc","institution_ids":["https://openalex.org/I4210148468"]},{"raw_affiliation_string":"Industrial Technology Research Institute, Hsinchu, Taiwan ROC","institution_ids":["https://openalex.org/I4210148468"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063000296","display_name":"Shui-An Wen","orcid":null},"institutions":[{"id":"https://openalex.org/I4210148468","display_name":"Industrial Technology Research Institute","ror":"https://ror.org/05szzwt63","country_code":"TW","type":"nonprofit","lineage":["https://openalex.org/I4210148468"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Shui-An Wen","raw_affiliation_strings":["Industrial Technology Research Institute, Hsinchu, Taiwan Roc","Industrial Technology Research Institute, Hsinchu, Taiwan ROC"],"affiliations":[{"raw_affiliation_string":"Industrial Technology Research Institute, Hsinchu, Taiwan Roc","institution_ids":["https://openalex.org/I4210148468"]},{"raw_affiliation_string":"Industrial Technology Research Institute, Hsinchu, Taiwan ROC","institution_ids":["https://openalex.org/I4210148468"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5079612691","display_name":"Yi-Fa Sun","orcid":null},"institutions":[{"id":"https://openalex.org/I4210148468","display_name":"Industrial Technology Research Institute","ror":"https://ror.org/05szzwt63","country_code":"TW","type":"nonprofit","lineage":["https://openalex.org/I4210148468"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yi-Fa Sun","raw_affiliation_strings":["Industrial Technology Research Institute, Hsinchu, Taiwan Roc","Industrial Technology Research Institute, Hsinchu, Taiwan ROC"],"affiliations":[{"raw_affiliation_string":"Industrial Technology Research Institute, Hsinchu, Taiwan Roc","institution_ids":["https://openalex.org/I4210148468"]},{"raw_affiliation_string":"Industrial Technology Research Institute, Hsinchu, Taiwan ROC","institution_ids":["https://openalex.org/I4210148468"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5084633263"],"corresponding_institution_ids":["https://openalex.org/I4210148468"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.07247972,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"311","last_page":"312"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9925000071525574,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9843000173568726,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.7393678426742554},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7037626504898071},{"id":"https://openalex.org/keywords/stacking","display_name":"Stacking","score":0.7018158435821533},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.6652423739433289},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.6386470794677734},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.531798779964447},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5058233737945557},{"id":"https://openalex.org/keywords/memory-architecture","display_name":"Memory architecture","score":0.48748779296875},{"id":"https://openalex.org/keywords/layer","display_name":"Layer (electronics)","score":0.4702426791191101},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4698849022388458},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4331015646457672},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.28163808584213257},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.1993197202682495},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15156087279319763},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.13852640986442566},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.12149995565414429},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1195991039276123},{"id":"https://openalex.org/keywords/nanotechnology","display_name":"Nanotechnology","score":0.07510718703269958}],"concepts":[{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.7393678426742554},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7037626504898071},{"id":"https://openalex.org/C33347731","wikidata":"https://www.wikidata.org/wiki/Q285210","display_name":"Stacking","level":2,"score":0.7018158435821533},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.6652423739433289},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.6386470794677734},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.531798779964447},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5058233737945557},{"id":"https://openalex.org/C2779602883","wikidata":"https://www.wikidata.org/wiki/Q15544750","display_name":"Memory architecture","level":2,"score":0.48748779296875},{"id":"https://openalex.org/C2779227376","wikidata":"https://www.wikidata.org/wiki/Q6505497","display_name":"Layer (electronics)","level":2,"score":0.4702426791191101},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4698849022388458},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4331015646457672},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.28163808584213257},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.1993197202682495},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15156087279319763},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.13852640986442566},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.12149995565414429},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1195991039276123},{"id":"https://openalex.org/C171250308","wikidata":"https://www.wikidata.org/wiki/Q11468","display_name":"Nanotechnology","level":1,"score":0.07510718703269958},{"id":"https://openalex.org/C46141821","wikidata":"https://www.wikidata.org/wiki/Q209402","display_name":"Nuclear magnetic resonance","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2483028.2483117","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2483028.2483117","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 23rd ACM international conference on Great lakes symposium on VLSI","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.47999998927116394,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W2130418369","https://openalex.org/W2139507995","https://openalex.org/W2592799925","https://openalex.org/W2692974053","https://openalex.org/W4300262240"],"related_works":["https://openalex.org/W2058965144","https://openalex.org/W2164382479","https://openalex.org/W2146343568","https://openalex.org/W98480971","https://openalex.org/W2150291671","https://openalex.org/W2013643406","https://openalex.org/W2027972911","https://openalex.org/W2157978810","https://openalex.org/W2119025037","https://openalex.org/W2026052914"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"a":[3,21,26,34,54],"low":[4,27],"power":[5,28],"and":[6,33,88],"high":[7],"performance":[8,56],"three-dimensional":[9],"(3-D)":[10],"stacking":[11],"multimedia":[12,66],"platform":[13,19],"called":[14],"\"3D-PAC\"":[15],"is":[16,20,53,70,82,92],"proposed.":[17],"This":[18,68],"heterogeneous":[22],"integration":[23],"composed":[24],"of":[25,80],"design":[29],"logic":[30],"layer":[31,91],"(2D-PAC)":[32],"reconfigurable":[35],"memory":[36],"tier":[37],"via":[38],"3-D":[39,43],"technology.":[40,77],"After":[41],"extensive":[42],"architecture":[44,63],"exploration":[45],"with":[46,59,102],"Electronic":[47],"System":[48],"Level":[49],"(ESL)":[50],"simulation,":[51],"there":[52],"54%":[55],"speedup":[57],"compared":[58],"the":[60,89],"former":[61],"2-D":[62],"for":[64],"certain":[65],"applications.":[67],"chip":[69],"fabricated":[71],"in":[72],"TSMC":[73],"90nm":[74],"generic":[75],"CMOS":[76],"The":[78],"area":[79],"2D-PAC":[81],"about":[83,93],"7880":[84,86],"x":[85,95],"\u03bcm2":[87],"SRAM":[90],"3880":[94,96],"\u03bcm2.":[97],"Both":[98],"layers":[99],"are":[100],"combined":[101],"1,886":[103],"TSVs.":[104]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
