{"id":"https://openalex.org/W2054581971","doi":"https://doi.org/10.1145/2463209.2488928","title":"DMR3D","display_name":"DMR3D","publication_year":2013,"publication_date":"2013-05-28","ids":{"openalex":"https://openalex.org/W2054581971","doi":"https://doi.org/10.1145/2463209.2488928","mag":"2054581971"},"language":"en","primary_location":{"id":"doi:10.1145/2463209.2488928","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2463209.2488928","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 50th Annual Design Automation Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5109247900","display_name":"Dean Michael Ancajas","orcid":null},"institutions":[{"id":"https://openalex.org/I121980950","display_name":"Utah State University","ror":"https://ror.org/00h6set76","country_code":"US","type":"education","lineage":["https://openalex.org/I121980950"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Dean Michael Ancajas","raw_affiliation_strings":["Utah State University","Bridge Lab., Electr. & Comput. Eng., Utah State Univ., Logan, UT, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Utah State University","institution_ids":["https://openalex.org/I121980950"]},{"raw_affiliation_string":"Bridge Lab., Electr. & Comput. Eng., Utah State Univ., Logan, UT, USA","institution_ids":["https://openalex.org/I121980950"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101594477","display_name":"Koushik Chakraborty","orcid":"https://orcid.org/0000-0003-0228-2737"},"institutions":[{"id":"https://openalex.org/I121980950","display_name":"Utah State University","ror":"https://ror.org/00h6set76","country_code":"US","type":"education","lineage":["https://openalex.org/I121980950"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Koushik Chakraborty","raw_affiliation_strings":["Utah State University","Bridge Lab., Electr. & Comput. Eng., Utah State Univ., Logan, UT, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Utah State University","institution_ids":["https://openalex.org/I121980950"]},{"raw_affiliation_string":"Bridge Lab., Electr. & Comput. Eng., Utah State Univ., Logan, UT, USA","institution_ids":["https://openalex.org/I121980950"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5068885938","display_name":"Sanghamitra Roy","orcid":"https://orcid.org/0000-0002-3927-1612"},"institutions":[{"id":"https://openalex.org/I121980950","display_name":"Utah State University","ror":"https://ror.org/00h6set76","country_code":"US","type":"education","lineage":["https://openalex.org/I121980950"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sanghamitra Roy","raw_affiliation_strings":["Utah State University","Bridge Lab., Electr. & Comput. Eng., Utah State Univ., Logan, UT, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Utah State University","institution_ids":["https://openalex.org/I121980950"]},{"raw_affiliation_string":"Bridge Lab., Electr. & Comput. Eng., Utah State Univ., Logan, UT, USA","institution_ids":["https://openalex.org/I121980950"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.3172,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.61238374,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"9"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.796974778175354},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.7018550038337708},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.5587702393531799},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.5375530123710632},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.47003573179244995},{"id":"https://openalex.org/keywords/uniform-memory-access","display_name":"Uniform memory access","score":0.46303591132164},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.44648316502571106},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.4409283399581909},{"id":"https://openalex.org/keywords/flat-memory-model","display_name":"Flat memory model","score":0.4268086850643158},{"id":"https://openalex.org/keywords/registered-memory","display_name":"Registered memory","score":0.4154038727283478},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3802104592323303},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3651239275932312},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.3551493287086487},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.34248843789100647},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.20820626616477966},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.20548811554908752},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08689805865287781}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.796974778175354},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.7018550038337708},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.5587702393531799},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.5375530123710632},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.47003573179244995},{"id":"https://openalex.org/C51290061","wikidata":"https://www.wikidata.org/wiki/Q1936765","display_name":"Uniform memory access","level":4,"score":0.46303591132164},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.44648316502571106},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.4409283399581909},{"id":"https://openalex.org/C57863822","wikidata":"https://www.wikidata.org/wiki/Q905488","display_name":"Flat memory model","level":4,"score":0.4268086850643158},{"id":"https://openalex.org/C93446704","wikidata":"https://www.wikidata.org/wiki/Q449328","display_name":"Registered memory","level":3,"score":0.4154038727283478},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3802104592323303},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3651239275932312},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.3551493287086487},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.34248843789100647},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.20820626616477966},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.20548811554908752},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08689805865287781}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/2463209.2488928","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2463209.2488928","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 50th Annual Design Automation Conference","raw_type":"proceedings-article"},{"id":"pmh:oai:digitalcommons.usu.edu:ece_facpub-1264","is_oa":false,"landing_page_url":"https://digitalcommons.usu.edu/ece_facpub/260","pdf_url":null,"source":{"id":"https://openalex.org/S4377196327","display_name":"Digital Commons - USU (Utah State University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I121980950","host_organization_name":"Utah State University","host_organization_lineage":["https://openalex.org/I121980950"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Electrical and Computer Engineering Faculty Publications","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8999999761581421}],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320306431","display_name":"Micron Foundation","ror":"https://ror.org/02fv52296"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W121576957","https://openalex.org/W1579295331","https://openalex.org/W1980419087","https://openalex.org/W1993089791","https://openalex.org/W2009795871","https://openalex.org/W2036853599","https://openalex.org/W2081597309","https://openalex.org/W2095314640","https://openalex.org/W2115617161","https://openalex.org/W2120635877","https://openalex.org/W2122636510","https://openalex.org/W2131413854","https://openalex.org/W2139730616","https://openalex.org/W2143515003","https://openalex.org/W2144154231","https://openalex.org/W2155371841","https://openalex.org/W2170382128","https://openalex.org/W2464177207"],"related_works":["https://openalex.org/W2354036839","https://openalex.org/W2044064773","https://openalex.org/W4321458411","https://openalex.org/W2155373950","https://openalex.org/W2782503170","https://openalex.org/W3048967625","https://openalex.org/W1575240748","https://openalex.org/W2296275612","https://openalex.org/W4248614727","https://openalex.org/W2885040162"],"abstract_inverted_index":{"Three-dimensional":[0],"Multicore":[1],"Systems":[2],"present":[3],"unique":[4],"opportunities":[5],"for":[6,33],"proximity":[7],"driven":[8],"data":[9],"placement":[10],"in":[11,24],"the":[12,55],"memory":[13,18,44,63],"banks.":[14],"Coupled":[15],"with":[16],"distributed":[17],"controllers,":[19],"a":[20,29],"design":[21],"trend":[22],"seen":[23],"recent":[25],"systems,":[26],"we":[27],"propose":[28],"Dynamic":[30],"Memory":[31],"Relocator":[32],"3D":[34],"Multicores":[35],"(DMR3D)":[36],"to":[37],"dynamically":[38],"migrate":[39],"physical":[40],"pages":[41],"among":[42],"different":[43],"controllers.":[45],"Our":[46,69],"proposed":[47],"technique":[48],"avoids":[49],"long":[50],"interconnect":[51],"delays,":[52],"and":[53,66,73,77],"increases":[54],"use":[56],"of":[57],"vertical":[58],"interconnect,":[59],"thereby":[60],"substantially":[61],"reducing":[62],"access":[64],"latency":[65],"communication":[67,78],"energy.":[68],"techniques":[70],"show":[71],"30%":[72],"25%":[74],"average":[75],"performance":[76],"energy":[79],"improvement":[80],"on":[81],"real":[82],"world":[83],"applications.":[84]},"counts_by_year":[{"year":2014,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2016-06-24T00:00:00"}