{"id":"https://openalex.org/W4254575363","doi":"https://doi.org/10.1145/2442992","title":"Proceedings of the 2013 International Workshop on Programming Models and Applications for Multicores and Manycores","display_name":"Proceedings of the 2013 International Workshop on Programming Models and Applications for Multicores and Manycores","publication_year":2013,"publication_date":"2013-02-23","ids":{"openalex":"https://openalex.org/W4254575363","doi":"https://doi.org/10.1145/2442992"},"language":"en","primary_location":{"id":"doi:10.1145/2442992","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2442992","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":null,"raw_type":"proceedings"},"type":"paratext","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":true,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9947999715805054,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9879999756813049,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7837084531784058},{"id":"https://openalex.org/keywords/perspective","display_name":"Perspective (graphical)","score":0.66037517786026},{"id":"https://openalex.org/keywords/programming-paradigm","display_name":"Programming paradigm","score":0.55185866355896},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.5098032355308533},{"id":"https://openalex.org/keywords/electronic-system-level-design-and-verification","display_name":"Electronic system-level design and verification","score":0.4584578573703766},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.43993672728538513},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.4214213788509369},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4071469306945801},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.39442622661590576},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.35075467824935913},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.18979471921920776},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.12967145442962646}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7837084531784058},{"id":"https://openalex.org/C12713177","wikidata":"https://www.wikidata.org/wiki/Q1900281","display_name":"Perspective (graphical)","level":2,"score":0.66037517786026},{"id":"https://openalex.org/C34165917","wikidata":"https://www.wikidata.org/wiki/Q188267","display_name":"Programming paradigm","level":2,"score":0.55185866355896},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.5098032355308533},{"id":"https://openalex.org/C77495112","wikidata":"https://www.wikidata.org/wiki/Q5358436","display_name":"Electronic system-level design and verification","level":2,"score":0.4584578573703766},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.43993672728538513},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.4214213788509369},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4071469306945801},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.39442622661590576},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.35075467824935913},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.18979471921920776},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.12967145442962646}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2442992","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2442992","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":null,"raw_type":"proceedings"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W3023876411","https://openalex.org/W2022477927","https://openalex.org/W123152114","https://openalex.org/W2502691491","https://openalex.org/W3142211975","https://openalex.org/W4237771018","https://openalex.org/W1879443270","https://openalex.org/W2018912978","https://openalex.org/W2097819797","https://openalex.org/W4238487776"],"abstract_inverted_index":{"Programming":[0],"heterogeneous":[1],"MPSoCs":[2],"(Multi-Processor":[3],"Systems":[4],"on":[5],"Chip)":[6],"is":[7],"a":[8],"grand":[9],"challenge":[10],"for":[11,23],"embedded":[12],"SoC":[13],"providers":[14],"and":[15,26,32],"users":[16],"today.":[17],"In":[18],"this":[19],"paper,":[20],"we":[21],"argue":[22],"the":[24,30,36],"need":[25],"significance":[27],"of":[28,38],"positioning":[29],"language":[31],"tool":[33],"design":[34],"from":[35],"perspective":[37],"...":[39]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
