{"id":"https://openalex.org/W2077716725","doi":"https://doi.org/10.1145/2442754.2442759","title":"Model checking of global power management strategies in software with temporal logic properties","display_name":"Model checking of global power management strategies in software with temporal logic properties","publication_year":2013,"publication_date":"2013-02-21","ids":{"openalex":"https://openalex.org/W2077716725","doi":"https://doi.org/10.1145/2442754.2442759","mag":"2077716725"},"language":"en","primary_location":{"id":"doi:10.1145/2442754.2442759","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2442754.2442759","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 6th India Software Engineering Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101659200","display_name":"Rajdeep Mukherjee","orcid":"https://orcid.org/0000-0002-2267-1695"},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Rajdeep Mukherjee","raw_affiliation_strings":["Indian Institute of Technology Kharagpur"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Kharagpur","institution_ids":["https://openalex.org/I145894827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112740343","display_name":"Subhankar Mukherjee","orcid":null},"institutions":[{"id":"https://openalex.org/I4210139030","display_name":"Samsung (India)","ror":"https://ror.org/04cpx2569","country_code":"IN","type":"company","lineage":["https://openalex.org/I2250650973","https://openalex.org/I4210139030"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Subhankar Mukherjee","raw_affiliation_strings":["Samsung India Software Operations"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Samsung India Software Operations","institution_ids":["https://openalex.org/I4210139030"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5033329960","display_name":"Pallab Dasgupta","orcid":"https://orcid.org/0000-0002-2178-8154"},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Pallab Dasgupta","raw_affiliation_strings":["Indian Institute of Technology Kharagpur"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Kharagpur","institution_ids":["https://openalex.org/I145894827"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.12632612,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"29","last_page":"34"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9958000183105469,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9955999851226807,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/firmware","display_name":"Firmware","score":0.8628344535827637},{"id":"https://openalex.org/keywords/linear-temporal-logic","display_name":"Linear temporal logic","score":0.7388190627098083},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7155520915985107},{"id":"https://openalex.org/keywords/power-management","display_name":"Power management","score":0.6268405318260193},{"id":"https://openalex.org/keywords/temporal-logic","display_name":"Temporal logic","score":0.5937650203704834},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5105620622634888},{"id":"https://openalex.org/keywords/model-checking","display_name":"Model checking","score":0.5069320797920227},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.4985826015472412},{"id":"https://openalex.org/keywords/logic-simulation","display_name":"Logic simulation","score":0.4330430030822754},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.3941212594509125},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3890071511268616},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3286767601966858},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.25631245970726013},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.15850186347961426},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.12031048536300659},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.10546112060546875}],"concepts":[{"id":"https://openalex.org/C67212190","wikidata":"https://www.wikidata.org/wiki/Q104851","display_name":"Firmware","level":2,"score":0.8628344535827637},{"id":"https://openalex.org/C4777664","wikidata":"https://www.wikidata.org/wiki/Q1536492","display_name":"Linear temporal logic","level":2,"score":0.7388190627098083},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7155520915985107},{"id":"https://openalex.org/C2778774385","wikidata":"https://www.wikidata.org/wiki/Q4437810","display_name":"Power management","level":3,"score":0.6268405318260193},{"id":"https://openalex.org/C25016198","wikidata":"https://www.wikidata.org/wiki/Q781833","display_name":"Temporal logic","level":2,"score":0.5937650203704834},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5105620622634888},{"id":"https://openalex.org/C110251889","wikidata":"https://www.wikidata.org/wiki/Q1569697","display_name":"Model checking","level":2,"score":0.5069320797920227},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.4985826015472412},{"id":"https://openalex.org/C64859876","wikidata":"https://www.wikidata.org/wiki/Q173673","display_name":"Logic simulation","level":3,"score":0.4330430030822754},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.3941212594509125},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3890071511268616},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3286767601966858},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.25631245970726013},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.15850186347961426},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.12031048536300659},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.10546112060546875},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2442754.2442759","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2442754.2442759","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 6th India Software Engineering Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8100000023841858,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1541969962","https://openalex.org/W1562679818","https://openalex.org/W1583869287","https://openalex.org/W1596552075","https://openalex.org/W1786154393","https://openalex.org/W1797377815","https://openalex.org/W1998492944","https://openalex.org/W2023808162","https://openalex.org/W2026096005","https://openalex.org/W2105614525","https://openalex.org/W2117299787","https://openalex.org/W2129109920","https://openalex.org/W2138324004","https://openalex.org/W2139942673","https://openalex.org/W2141649130","https://openalex.org/W2171999426","https://openalex.org/W4212962636","https://openalex.org/W6638295334"],"related_works":["https://openalex.org/W2124110813","https://openalex.org/W3021103820","https://openalex.org/W2763487042","https://openalex.org/W2521108391","https://openalex.org/W1532447905","https://openalex.org/W2031188261","https://openalex.org/W4285022830","https://openalex.org/W4232446061","https://openalex.org/W2077520193","https://openalex.org/W1513400763"],"abstract_inverted_index":{"Complex":[0],"and":[1,35],"sophisticated":[2],"power":[3,17,22,28,43,47,51,68],"management":[4,29,69],"strategies":[5,30],"are":[6,31,36],"a":[7,62],"commonplace":[8],"design":[9],"policies":[10],"today":[11],"in":[12,33,49,55],"order":[13],"to":[14,38,96],"manage":[15],"the":[16,40,98,101],"consumption":[18],"of":[19,45,64,93,100],"complex":[20],"low":[21],"digital":[23],"integrated":[24],"circuits.":[25],"These":[26],"global":[27,67],"implemented":[32],"software/firmware":[34],"used":[37],"orchestrate":[39],"switching":[41],"between":[42],"states":[44],"multiple":[46],"domains":[48],"local":[50],"controllers":[52],"which":[53],"resides":[54],"hardware.":[56],"In":[57],"this":[58],"paper,":[59],"we":[60],"propose":[61],"methodology":[63],"verifying":[65],"such":[66],"softwares":[70],"with":[71],"safety":[72],"linear":[73],"temporal":[74],"logic":[75],"(LTL)":[76],"properties":[77],"using":[78],"bounded":[79],"model":[80],"checking":[81],"based":[82],"verification":[83],"approach.":[84],"We":[85],"present":[86],"our":[87],"results":[88],"on":[89],"several":[90],"test":[91],"cases":[92],"significant":[94],"complexity":[95],"demonstrate":[97],"feasibility":[99],"proposed":[102],"framework.":[103]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
