{"id":"https://openalex.org/W2142951442","doi":"https://doi.org/10.1145/2435264.2435303","title":"Architecture support for custom instructions with memory operations","display_name":"Architecture support for custom instructions with memory operations","publication_year":2013,"publication_date":"2013-02-11","ids":{"openalex":"https://openalex.org/W2142951442","doi":"https://doi.org/10.1145/2435264.2435303","mag":"2142951442"},"language":"en","primary_location":{"id":"doi:10.1145/2435264.2435303","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2435264.2435303","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5016776689","display_name":"Jason Cong","orcid":"https://orcid.org/0000-0003-2887-6963"},"institutions":[{"id":"https://openalex.org/I161318765","display_name":"University of California, Los Angeles","ror":"https://ror.org/046rm7j60","country_code":"US","type":"education","lineage":["https://openalex.org/I161318765"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Jason Cong","raw_affiliation_strings":["University of California Los Angeles, Los Angeles, CA, USA"],"affiliations":[{"raw_affiliation_string":"University of California Los Angeles, Los Angeles, CA, USA","institution_ids":["https://openalex.org/I161318765"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111994199","display_name":"Karthik Gururaj","orcid":null},"institutions":[{"id":"https://openalex.org/I161318765","display_name":"University of California, Los Angeles","ror":"https://ror.org/046rm7j60","country_code":"US","type":"education","lineage":["https://openalex.org/I161318765"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Karthik Gururaj","raw_affiliation_strings":["University of California Los Angeles, Los Angeles, CA, USA"],"affiliations":[{"raw_affiliation_string":"University of California Los Angeles, Los Angeles, CA, USA","institution_ids":["https://openalex.org/I161318765"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5016776689"],"corresponding_institution_ids":["https://openalex.org/I161318765"],"apc_list":null,"apc_paid":null,"fwci":0.3171,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.63767117,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"231","last_page":"234"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8667106628417969},{"id":"https://openalex.org/keywords/synchronization","display_name":"Synchronization (alternating current)","score":0.625289261341095},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5894281268119812},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.5251695513725281},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4939292073249817},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.46489399671554565},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.4510093629360199},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.443903386592865},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.44256332516670227},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3239694833755493},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.09682473540306091}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8667106628417969},{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.625289261341095},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5894281268119812},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.5251695513725281},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4939292073249817},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.46489399671554565},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.4510093629360199},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.443903386592865},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.44256332516670227},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3239694833755493},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.09682473540306091},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/2435264.2435303","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2435264.2435303","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.300.4961","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.300.4961","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://cadlab.cs.ucla.edu/~cong/papers/fpga13_3.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8999999761581421,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1956020392","https://openalex.org/W2034841960","https://openalex.org/W2103518090","https://openalex.org/W2107923684","https://openalex.org/W2111488604","https://openalex.org/W2134542516","https://openalex.org/W2144133815","https://openalex.org/W2147877714","https://openalex.org/W2150843905","https://openalex.org/W2164264749","https://openalex.org/W2165099691","https://openalex.org/W2165952312","https://openalex.org/W2170382128","https://openalex.org/W2544732887","https://openalex.org/W3141428879"],"related_works":["https://openalex.org/W122453572","https://openalex.org/W2466405623","https://openalex.org/W2151122729","https://openalex.org/W2351011383","https://openalex.org/W2146879484","https://openalex.org/W4221002079","https://openalex.org/W1757458251","https://openalex.org/W2141090099","https://openalex.org/W2045325972","https://openalex.org/W1980898636"],"abstract_inverted_index":{"Customized":[0],"instructions":[1],"(CIs)":[2],"implemented":[3],"using":[4],"custom":[5],"functional":[6],"units":[7],"(CFUs)":[8],"have":[9],"been":[10],"proposed":[11],"as":[12],"a":[13],"way":[14],"of":[15,21,26,75],"improving":[16],"performance":[17,90],"and":[18,28,94],"energy":[19,86],"efficiency":[20],"software":[22],"while":[23],"minimizing":[24],"cost":[25],"designing":[27],"verifying":[29],"accelerators":[30],"from":[31],"scratch.":[32],"However,":[33],"previous":[34],"work":[35,53],"allows":[36,59],"CIs":[37,60],"to":[38,61,71],"only":[39],"communicate":[40],"with":[41,47,88],"the":[42],"processor":[43,97],"through":[44],"registers":[45],"or":[46],"limited":[48],"memory":[49,64],"operations.":[50],"In":[51],"this":[52],"we":[54],"propose":[55],"an":[56],"architecture":[57,82],"that":[58,80],"seamlessly":[62],"execute":[63],"operations":[65,70],"without":[66],"any":[67],"special":[68],"synchronization":[69],"guarantee":[72],"program":[73],"order":[74],"instructions.":[76],"Our":[77],"results":[78],"show":[79],"our":[81],"can":[83],"provide":[84],"24\\%":[85],"savings":[87],"14%":[89],"improvement":[91],"for":[92],"2-issue":[93],"4-issue":[95],"superscalar":[96],"cores.":[98]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}