{"id":"https://openalex.org/W1980391015","doi":"https://doi.org/10.1145/2435264.2435294","title":"Improving bitstream compression by modifying FPGA architecture","display_name":"Improving bitstream compression by modifying FPGA architecture","publication_year":2013,"publication_date":"2013-02-11","ids":{"openalex":"https://openalex.org/W1980391015","doi":"https://doi.org/10.1145/2435264.2435294","mag":"1980391015"},"language":"en","primary_location":{"id":"doi:10.1145/2435264.2435294","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2435264.2435294","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5028222471","display_name":"Seyyed Ahmad Razavi","orcid":null},"institutions":[{"id":"https://openalex.org/I158248296","display_name":"Amirkabir University of Technology","ror":"https://ror.org/04gzbav43","country_code":"IR","type":"education","lineage":["https://openalex.org/I158248296"]}],"countries":["IR"],"is_corresponding":true,"raw_author_name":"Seyyed Ahmad Razavi","raw_affiliation_strings":["Amirkabir University of Technology, Tehran, Iran","Amirkabir University of Technology, Tehran, IRAN"],"affiliations":[{"raw_affiliation_string":"Amirkabir University of Technology, Tehran, Iran","institution_ids":["https://openalex.org/I158248296"]},{"raw_affiliation_string":"Amirkabir University of Technology, Tehran, IRAN","institution_ids":["https://openalex.org/I158248296"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5075732511","display_name":"Morteza Saheb Zamani","orcid":"https://orcid.org/0000-0002-0826-1091"},"institutions":[{"id":"https://openalex.org/I158248296","display_name":"Amirkabir University of Technology","ror":"https://ror.org/04gzbav43","country_code":"IR","type":"education","lineage":["https://openalex.org/I158248296"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Morteza Saheb Zamani","raw_affiliation_strings":["Amirkabir University of Technology, Tehran, Iran","Amirkabir University of Technology, Tehran, IRAN"],"affiliations":[{"raw_affiliation_string":"Amirkabir University of Technology, Tehran, Iran","institution_ids":["https://openalex.org/I158248296"]},{"raw_affiliation_string":"Amirkabir University of Technology, Tehran, IRAN","institution_ids":["https://openalex.org/I158248296"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5028222471"],"corresponding_institution_ids":["https://openalex.org/I158248296"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.06106598,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"167","last_page":"170"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/bitstream","display_name":"Bitstream","score":0.9383372068405151},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8695432543754578},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.796217143535614},{"id":"https://openalex.org/keywords/multiplexer","display_name":"Multiplexer","score":0.7167938947677612},{"id":"https://openalex.org/keywords/data-compression","display_name":"Data compression","score":0.6294036507606506},{"id":"https://openalex.org/keywords/compression","display_name":"Compression (physics)","score":0.47702619433403015},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.4756160378456116},{"id":"https://openalex.org/keywords/symbol","display_name":"Symbol (formal)","score":0.4722282886505127},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.457421213388443},{"id":"https://openalex.org/keywords/compression-ratio","display_name":"Compression ratio","score":0.4417814314365387},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.41819751262664795},{"id":"https://openalex.org/keywords/data-compression-ratio","display_name":"Data compression ratio","score":0.41187623143196106},{"id":"https://openalex.org/keywords/multiplexing","display_name":"Multiplexing","score":0.2857852280139923},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2507321238517761},{"id":"https://openalex.org/keywords/image-compression","display_name":"Image compression","score":0.20829781889915466},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.18233564496040344},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.10218843817710876},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.07817381620407104},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.06269705295562744}],"concepts":[{"id":"https://openalex.org/C136695289","wikidata":"https://www.wikidata.org/wiki/Q415568","display_name":"Bitstream","level":3,"score":0.9383372068405151},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8695432543754578},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.796217143535614},{"id":"https://openalex.org/C70970002","wikidata":"https://www.wikidata.org/wiki/Q189434","display_name":"Multiplexer","level":3,"score":0.7167938947677612},{"id":"https://openalex.org/C78548338","wikidata":"https://www.wikidata.org/wiki/Q2493","display_name":"Data compression","level":2,"score":0.6294036507606506},{"id":"https://openalex.org/C180016635","wikidata":"https://www.wikidata.org/wiki/Q2712821","display_name":"Compression (physics)","level":2,"score":0.47702619433403015},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.4756160378456116},{"id":"https://openalex.org/C134400042","wikidata":"https://www.wikidata.org/wiki/Q2372244","display_name":"Symbol (formal)","level":2,"score":0.4722282886505127},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.457421213388443},{"id":"https://openalex.org/C25797200","wikidata":"https://www.wikidata.org/wiki/Q828137","display_name":"Compression ratio","level":3,"score":0.4417814314365387},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.41819751262664795},{"id":"https://openalex.org/C94835093","wikidata":"https://www.wikidata.org/wiki/Q3113333","display_name":"Data compression ratio","level":5,"score":0.41187623143196106},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.2857852280139923},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2507321238517761},{"id":"https://openalex.org/C13481523","wikidata":"https://www.wikidata.org/wiki/Q412438","display_name":"Image compression","level":4,"score":0.20829781889915466},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.18233564496040344},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.10218843817710876},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.07817381620407104},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.06269705295562744},{"id":"https://openalex.org/C171146098","wikidata":"https://www.wikidata.org/wiki/Q124192","display_name":"Automotive engineering","level":1,"score":0.0},{"id":"https://openalex.org/C511840579","wikidata":"https://www.wikidata.org/wiki/Q12757","display_name":"Internal combustion engine","level":2,"score":0.0},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C9417928","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Image processing","level":3,"score":0.0},{"id":"https://openalex.org/C159985019","wikidata":"https://www.wikidata.org/wiki/Q181790","display_name":"Composite material","level":1,"score":0.0},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2435264.2435294","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2435264.2435294","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.7699999809265137,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W2035847677","https://openalex.org/W2079145130","https://openalex.org/W2083814951","https://openalex.org/W2101395624","https://openalex.org/W2108660906","https://openalex.org/W2149106173","https://openalex.org/W2159959433","https://openalex.org/W2172131185"],"related_works":["https://openalex.org/W2768628697","https://openalex.org/W1973200086","https://openalex.org/W1965503293","https://openalex.org/W2388481516","https://openalex.org/W2088378984","https://openalex.org/W2356662348","https://openalex.org/W2386366915","https://openalex.org/W4220868150","https://openalex.org/W2141840609","https://openalex.org/W2352008669"],"abstract_inverted_index":{"The":[0],"size":[1,20],"of":[2,5,21,48,50,77],"configuration":[3],"bitstreams":[4],"field-programmable":[6],"gate":[7],"arrays":[8],"(FPGA)":[9],"is":[10,55,79,99],"increasing":[11],"rapidly.":[12],"Compression":[13],"techniques":[14],"are":[15,34],"used":[16],"to":[17,36,58,70,106],"decrease":[18],"the":[19,38,43,60,65,72,93,96,107],"bitstreams.":[22],"In":[23],"this":[24],"paper,":[25],"an":[26],"appropriate":[27],"bitstream":[28,73],"format":[29],"and":[30,63,74,116],"variable":[31],"symbol":[32,61,111],"lengths":[33,112],"proposed":[35,57,94],"utilize":[37],"routing":[39],"patterns":[40],"for":[41],"enhancing":[42],"compression":[44,66,97],"efficiency.":[45,67],"An":[46],"order":[47],"inputs":[49],"multiplexers":[51],"in":[52],"switch":[53],"modules":[54],"also":[56],"improve":[59],"statistics":[62],"hence,":[64],"A":[68],"framework":[69],"generate":[71],"hardware":[75],"description":[76],"FPGAs":[78],"developed":[80],"as":[81],"well.":[82],"Experimental":[83],"results":[84],"over":[85],"20":[86],"MCNC":[87],"benchmarks":[88],"show":[89],"that":[90],"by":[91,101],"applying":[92],"approaches,":[95],"rate":[98],"improved":[100],"46%":[102],"on":[103],"average":[104],"compared":[105],"methods":[108],"with":[109],"fixed":[110],"without":[113],"any":[114],"area":[115],"performance":[117],"degradation.":[118]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2019,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}