{"id":"https://openalex.org/W2064907250","doi":"https://doi.org/10.1145/2435264.2435293","title":"Minimum energy operation for clustered island-style FPGAs","display_name":"Minimum energy operation for clustered island-style FPGAs","publication_year":2013,"publication_date":"2013-02-11","ids":{"openalex":"https://openalex.org/W2064907250","doi":"https://doi.org/10.1145/2435264.2435293","mag":"2064907250"},"language":"en","primary_location":{"id":"doi:10.1145/2435264.2435293","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2435264.2435293","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5048250815","display_name":"Peter Gro\u00dfmann","orcid":"https://orcid.org/0000-0001-6106-724X"},"institutions":[{"id":"https://openalex.org/I12912129","display_name":"Northeastern University","ror":"https://ror.org/04t5xt781","country_code":"US","type":"education","lineage":["https://openalex.org/I12912129"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Peter Grossmann","raw_affiliation_strings":["Northeastern University, Boston, MA, USA"],"affiliations":[{"raw_affiliation_string":"Northeastern University, Boston, MA, USA","institution_ids":["https://openalex.org/I12912129"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083047329","display_name":"Miriam Leeser","orcid":"https://orcid.org/0000-0002-5624-056X"},"institutions":[{"id":"https://openalex.org/I12912129","display_name":"Northeastern University","ror":"https://ror.org/04t5xt781","country_code":"US","type":"education","lineage":["https://openalex.org/I12912129"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Miriam E. Leeser","raw_affiliation_strings":["Northeastern University, Boston, MA, USA"],"affiliations":[{"raw_affiliation_string":"Northeastern University, Boston, MA, USA","institution_ids":["https://openalex.org/I12912129"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5082452997","display_name":"Marvin Onabajo","orcid":"https://orcid.org/0000-0002-6044-3693"},"institutions":[{"id":"https://openalex.org/I12912129","display_name":"Northeastern University","ror":"https://ror.org/04t5xt781","country_code":"US","type":"education","lineage":["https://openalex.org/I12912129"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Marvin Onabajo","raw_affiliation_strings":["Northeastern University, Boston, MA, USA"],"affiliations":[{"raw_affiliation_string":"Northeastern University, Boston, MA, USA","institution_ids":["https://openalex.org/I12912129"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5048250815"],"corresponding_institution_ids":["https://openalex.org/I12912129"],"apc_list":null,"apc_paid":null,"fwci":0.2364,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.61312916,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"157","last_page":"166"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7380675673484802},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.6280367374420166},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5563536882400513},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.5418411493301392},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.513116180896759},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.47021129727363586},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.46282583475112915},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4016174376010895},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3511839509010315},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.26569098234176636},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.06976056098937988}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7380675673484802},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.6280367374420166},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5563536882400513},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.5418411493301392},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.513116180896759},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.47021129727363586},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.46282583475112915},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4016174376010895},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3511839509010315},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.26569098234176636},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.06976056098937988},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2435264.2435293","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2435264.2435293","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.7200000286102295}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W649475307","https://openalex.org/W1528837436","https://openalex.org/W1977773588","https://openalex.org/W1989477191","https://openalex.org/W2007565138","https://openalex.org/W2021559670","https://openalex.org/W2043430984","https://openalex.org/W2057899754","https://openalex.org/W2097521167","https://openalex.org/W2108165851","https://openalex.org/W2111427553","https://openalex.org/W2123278390","https://openalex.org/W2127309005","https://openalex.org/W2138383740","https://openalex.org/W2138840350","https://openalex.org/W2140680235","https://openalex.org/W2168493238"],"related_works":["https://openalex.org/W2165367082","https://openalex.org/W2111241003","https://openalex.org/W1972641423","https://openalex.org/W1485756991","https://openalex.org/W2376218453","https://openalex.org/W2984236338","https://openalex.org/W2096844293","https://openalex.org/W2363944576","https://openalex.org/W2351041855","https://openalex.org/W2570254841"],"abstract_inverted_index":{"Despite":[0],"the":[1,18,65,94,110],"advantages":[2],"offered":[3],"by":[4],"field-programmable":[5],"gate":[6],"arrays":[7],"(FPGAs)":[8],"for":[9,32,52,146],"low-power":[10],"systems":[11,34],"requiring":[12],"flexible":[13],"computing":[14],"resources,":[15],"applications":[16],"with":[17,80,155],"lowest":[19,95],"power":[20],"budgets":[21],"still":[22],"favor":[23],"microprocessors":[24,55],"and":[25,54],"application-specific":[26],"integrated":[27],"circuits":[28,116],"(ASICs).":[29],"In":[30],"order":[31],"such":[33],"to":[35,56,130],"exploit":[36],"FPGAs,":[37],"an":[38,99],"FPGA":[39,100],"achieving":[40],"minimum":[41,111,122],"energy":[42,47,112],"operation":[43],"is":[44,117],"needed.":[45],"Minimum":[46],"points":[48],"have":[49],"been":[50,102],"found":[51],"ASICs":[53],"occur":[57],"at":[58,97,118,126],"operating":[59,79,123],"voltages":[60],"that":[61,109,151],"are":[62,152],"typically":[63],"below":[64,120],"transistor":[66],"threshold":[67],"voltage.":[68,124],"This":[69,90],"paper":[70],"presents":[71],"two":[72],"clustered":[73],"island-style":[74],"test":[75],"chips":[76],"capable":[77],"of":[78,114],"a":[81,131,142],"single":[82],"supply":[83,91],"voltage":[84,92,96,149],"as":[85,87],"low":[86,148],"260":[88,127],"mV.":[89],"represents":[93],"which":[98],"has":[101],"successfully":[103],"programmed.":[104],"Test":[105],"chip":[106],"measurements":[107],"show":[108],"point":[113],"both":[115],"or":[119],"this":[121],"Operation":[125],"mV":[128],"leads":[129],"40X":[132],"power-delay":[133],"product":[134],"reduction":[135],"vs.":[136],"1.5V":[137],"operation.":[138],"The":[139],"results":[140],"demonstrate":[141],"clear":[143],"path":[144],"forward":[145],"fabricating":[147],"FPGAs":[150],"fully":[153],"compatible":[154],"existing":[156],"tool":[157],"flows.":[158]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
