{"id":"https://openalex.org/W2005379524","doi":"https://doi.org/10.1145/2435227.2435248","title":"Power minimization for dynamically reconfigurable FPGA partitioning","display_name":"Power minimization for dynamically reconfigurable FPGA partitioning","publication_year":2013,"publication_date":"2013-03-01","ids":{"openalex":"https://openalex.org/W2005379524","doi":"https://doi.org/10.1145/2435227.2435248","mag":"2005379524"},"language":"en","primary_location":{"id":"doi:10.1145/2435227.2435248","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2435227.2435248","pdf_url":null,"source":{"id":"https://openalex.org/S136160450","display_name":"ACM Transactions on Embedded Computing Systems","issn_l":"1539-9087","issn":["1539-9087","1558-3465"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Embedded Computing Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102157785","display_name":"Tzu-Chiang Tai","orcid":null},"institutions":[{"id":"https://openalex.org/I177918364","display_name":"Providence University","ror":"https://ror.org/03fcpsq87","country_code":"TW","type":"education","lineage":["https://openalex.org/I177918364"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Tzu-Chiang Tai","raw_affiliation_strings":["Providence University, Taichung, Taiwan"],"affiliations":[{"raw_affiliation_string":"Providence University, Taichung, Taiwan","institution_ids":["https://openalex.org/I177918364"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5112046582","display_name":"Yen\u2010Tai Lai","orcid":null},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yen-Tai Lai","raw_affiliation_strings":["National Cheng Kung University, Tainan, Taiwan"],"affiliations":[{"raw_affiliation_string":"National Cheng Kung University, Tainan, Taiwan","institution_ids":["https://openalex.org/I91807558"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5102157785"],"corresponding_institution_ids":["https://openalex.org/I177918364"],"apc_list":null,"apc_paid":null,"fwci":0.9456,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.74921882,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":96,"max":97},"biblio":{"volume":"12","issue":"1s","first_page":"1","last_page":"22"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8680435419082642},{"id":"https://openalex.org/keywords/lookup-table","display_name":"Lookup table","score":0.7246177792549133},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6540937423706055},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.550798237323761},{"id":"https://openalex.org/keywords/partition","display_name":"Partition (number theory)","score":0.5368587970733643},{"id":"https://openalex.org/keywords/minification","display_name":"Minification","score":0.5324115753173828},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5074085593223572},{"id":"https://openalex.org/keywords/limit","display_name":"Limit (mathematics)","score":0.4654354155063629},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.4362753629684448},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.38951683044433594},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.34610995650291443},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.32535892724990845}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8680435419082642},{"id":"https://openalex.org/C134835016","wikidata":"https://www.wikidata.org/wiki/Q690265","display_name":"Lookup table","level":2,"score":0.7246177792549133},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6540937423706055},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.550798237323761},{"id":"https://openalex.org/C42812","wikidata":"https://www.wikidata.org/wiki/Q1082910","display_name":"Partition (number theory)","level":2,"score":0.5368587970733643},{"id":"https://openalex.org/C147764199","wikidata":"https://www.wikidata.org/wiki/Q6865248","display_name":"Minification","level":2,"score":0.5324115753173828},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5074085593223572},{"id":"https://openalex.org/C151201525","wikidata":"https://www.wikidata.org/wiki/Q177239","display_name":"Limit (mathematics)","level":2,"score":0.4654354155063629},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.4362753629684448},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.38951683044433594},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.34610995650291443},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.32535892724990845},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2435227.2435248","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2435227.2435248","pdf_url":null,"source":{"id":"https://openalex.org/S136160450","display_name":"ACM Transactions on Embedded Computing Systems","issn_l":"1539-9087","issn":["1539-9087","1558-3465"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Embedded Computing Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8999999761581421}],"awards":[{"id":"https://openalex.org/G7171249891","display_name":null,"funder_award_id":"NSC-99-2218-E-126-003 and NSC-100-2221-E-126-005","funder_id":"https://openalex.org/F4320321040","funder_display_name":"National Science Council"}],"funders":[{"id":"https://openalex.org/F4320321040","display_name":"National Science Council","ror":"https://ror.org/02kv4zf79"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":29,"referenced_works":["https://openalex.org/W186330905","https://openalex.org/W1594214086","https://openalex.org/W1806428288","https://openalex.org/W1964119857","https://openalex.org/W1979219751","https://openalex.org/W2005776857","https://openalex.org/W2006097283","https://openalex.org/W2007892284","https://openalex.org/W2022898841","https://openalex.org/W2030094243","https://openalex.org/W2036943007","https://openalex.org/W2038084901","https://openalex.org/W2082222980","https://openalex.org/W2100038564","https://openalex.org/W2111354701","https://openalex.org/W2112557094","https://openalex.org/W2115512913","https://openalex.org/W2126539367","https://openalex.org/W2128239317","https://openalex.org/W2137917061","https://openalex.org/W2139292565","https://openalex.org/W2148215956","https://openalex.org/W2155814884","https://openalex.org/W2160651385","https://openalex.org/W2160771021","https://openalex.org/W2168244800","https://openalex.org/W2170657266","https://openalex.org/W2293783743","https://openalex.org/W4285719527"],"related_works":["https://openalex.org/W2798215405","https://openalex.org/W2990962948","https://openalex.org/W2111241003","https://openalex.org/W2117300767","https://openalex.org/W2024574431","https://openalex.org/W2374017528","https://openalex.org/W4285503609","https://openalex.org/W2126248441","https://openalex.org/W2366961778","https://openalex.org/W1572721274"],"abstract_inverted_index":{"Dynamically":[0],"reconfigurable":[1],"FPGA":[2],"(DRFPGA)":[3],"implements":[4],"a":[5,71,76,151,168],"given":[6,77],"circuit":[7,78,96],"system":[8],"by":[9,57],"partitioning":[10,34,114,128,189],"it":[11],"into":[12],"stages":[13],"and":[14,89,158],"then":[15,105,138],"executing":[16],"each":[17],"stage":[18],"sequentially.":[19],"Traditionally,":[20],"the":[21,33,41,53,58,62,67,81,90,108,112,126,144,163,174,177,187,193],"number":[22,145,195],"of":[23,84,115,132,146,162,176],"communication":[24,59,147],"buffers":[25,60,85],"is":[26,86,104,137],"minimized.":[27],"In":[28],"this":[29,155],"article,":[30],"we":[31,69],"study":[32],"problem":[35,136,157],"targeting":[36],"at":[37],"power":[38,54,82,117,133,182],"minimization":[39],"for":[40,154],"DRFPGAs":[42],"that":[43,80,122],"have":[44],"lookup":[45],"table":[46],"(LUT)":[47],"based":[48],"logic":[49],"blocks.":[50],"We":[51,149],"analyze":[52],"consumption":[55,83,183],"caused":[56],"in":[61,95,130,180],"temporal":[63,91],"partitioning.":[64,97],"Based":[65],"on":[66,143],"analysis,":[68],"use":[70],"flow":[72],"network":[73,109],"to":[74,107,110,140,166,186],"represent":[75],"so":[79],"correctly":[87],"evaluated":[88],"constraints":[92,142],"are":[93],"satisfied":[94],"The":[98,135],"well":[99],"known":[100],"flow-based":[101],"FBB":[102,164],"algorithm":[103,165,179],"applied":[106],"find":[111],"area-balanced":[113],"minimum":[116],"consumption.":[118,134],"Experimental":[119,171],"results":[120,172],"show":[121],"our":[123],"method":[124],"outperforms":[125],"conventional":[127],"algorithms":[129,190],"terms":[131],"extended":[139,156],"include":[141],"buffers.":[148],"provide":[150],"net":[152],"modeling":[153],"present":[159],"an":[160],"extension":[161],"obtain":[167],"power-optimal":[169],"solution.":[170],"demonstrate":[173],"effectiveness":[175],"proposed":[178],"reducing":[181],"as":[184],"compared":[185],"previous":[188],"without":[191],"exceeding":[192],"buffer":[194],"limit.":[196]},"counts_by_year":[{"year":2016,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
