{"id":"https://openalex.org/W1972517864","doi":"https://doi.org/10.1145/2411116.2411121","title":"Efficient architecture and scheduling technique for pairwise sequence alignment","display_name":"Efficient architecture and scheduling technique for pairwise sequence alignment","publication_year":2012,"publication_date":"2012-12-05","ids":{"openalex":"https://openalex.org/W1972517864","doi":"https://doi.org/10.1145/2411116.2411121","mag":"1972517864"},"language":"en","primary_location":{"id":"doi:10.1145/2411116.2411121","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2411116.2411121","pdf_url":null,"source":{"id":"https://openalex.org/S4210193905","display_name":"ACM SIGARCH Computer Architecture News","issn_l":"0163-5964","issn":["0163-5964","1943-5851"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320740","host_organization_name":"ACM SIGARCH","host_organization_lineage":["https://openalex.org/P4310320740"],"host_organization_lineage_names":["ACM SIGARCH"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM SIGARCH Computer Architecture News","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5012784634","display_name":"Mohd Nazrin Md Isa","orcid":"https://orcid.org/0000-0002-3296-0917"},"institutions":[{"id":"https://openalex.org/I98677209","display_name":"University of Edinburgh","ror":"https://ror.org/01nrxwf90","country_code":"GB","type":"education","lineage":["https://openalex.org/I98677209"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"M. N. Isa","raw_affiliation_strings":["System Level, Integration Group, School of Engineering, University of Edinburgh, U.K"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"System Level, Integration Group, School of Engineering, University of Edinburgh, U.K","institution_ids":["https://openalex.org/I98677209"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111836086","display_name":"K. Benkrid","orcid":null},"institutions":[{"id":"https://openalex.org/I98677209","display_name":"University of Edinburgh","ror":"https://ror.org/01nrxwf90","country_code":"GB","type":"education","lineage":["https://openalex.org/I98677209"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"K. Benkrid","raw_affiliation_strings":["System Level, Integration Group, School of Engineering, University of Edinburgh, U.K"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"System Level, Integration Group, School of Engineering, University of Edinburgh, U.K","institution_ids":["https://openalex.org/I98677209"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5006623687","display_name":"Thomas Clayton","orcid":null},"institutions":[{"id":"https://openalex.org/I98677209","display_name":"University of Edinburgh","ror":"https://ror.org/01nrxwf90","country_code":"GB","type":"education","lineage":["https://openalex.org/I98677209"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"T. Clayton","raw_affiliation_strings":["System Level, Integration Group, School of Engineering, University of Edinburgh, U.K"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"System Level, Integration Group, School of Engineering, University of Edinburgh, U.K","institution_ids":["https://openalex.org/I98677209"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I98677209"],"apc_list":null,"apc_paid":null,"fwci":0.2648,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.56076988,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"40","issue":"4","first_page":"26","last_page":"31"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10015","display_name":"Genomics and Phylogenetic Studies","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1312","display_name":"Molecular Biology"},"field":{"id":"https://openalex.org/fields/13","display_name":"Biochemistry, Genetics and Molecular Biology"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},"topics":[{"id":"https://openalex.org/T10015","display_name":"Genomics and Phylogenetic Studies","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1312","display_name":"Molecular Biology"},"field":{"id":"https://openalex.org/fields/13","display_name":"Biochemistry, Genetics and Molecular Biology"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},{"id":"https://openalex.org/T11269","display_name":"Algorithms and Data Compression","score":0.9807000160217285,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10521","display_name":"RNA and protein synthesis mechanisms","score":0.9688000082969666,"subfield":{"id":"https://openalex.org/subfields/1312","display_name":"Molecular Biology"},"field":{"id":"https://openalex.org/fields/13","display_name":"Biochemistry, Genetics and Molecular Biology"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7118391394615173},{"id":"https://openalex.org/keywords/pairwise-comparison","display_name":"Pairwise comparison","score":0.6910074353218079},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6708635091781616},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.656217098236084},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.6332643032073975},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.6008524894714355},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5562559962272644},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.45351144671440125},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.422113299369812},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.38513728976249695},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.34370070695877075},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.15829145908355713},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.06603911519050598}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7118391394615173},{"id":"https://openalex.org/C184898388","wikidata":"https://www.wikidata.org/wiki/Q1435712","display_name":"Pairwise comparison","level":2,"score":0.6910074353218079},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6708635091781616},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.656217098236084},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.6332643032073975},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.6008524894714355},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5562559962272644},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.45351144671440125},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.422113299369812},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.38513728976249695},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.34370070695877075},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.15829145908355713},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.06603911519050598},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2411116.2411121","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2411116.2411121","pdf_url":null,"source":{"id":"https://openalex.org/S4210193905","display_name":"ACM SIGARCH Computer Architecture News","issn_l":"0163-5964","issn":["0163-5964","1943-5851"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320740","host_organization_name":"ACM SIGARCH","host_organization_lineage":["https://openalex.org/P4310320740"],"host_organization_lineage_names":["ACM SIGARCH"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM SIGARCH Computer Architecture News","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W86339357","https://openalex.org/W1570617259","https://openalex.org/W1585577780","https://openalex.org/W1935349158","https://openalex.org/W1992519395","https://openalex.org/W2009570821","https://openalex.org/W2039693716","https://openalex.org/W2068448872","https://openalex.org/W2115559042","https://openalex.org/W2122942724","https://openalex.org/W2140598222","https://openalex.org/W2142599417","https://openalex.org/W2144316495","https://openalex.org/W2156264615","https://openalex.org/W2163680465","https://openalex.org/W2173952877","https://openalex.org/W3204547926","https://openalex.org/W4245668478","https://openalex.org/W6640495292","https://openalex.org/W6682739957"],"related_works":["https://openalex.org/W2058965144","https://openalex.org/W2164382479","https://openalex.org/W2146343568","https://openalex.org/W98480971","https://openalex.org/W2150291671","https://openalex.org/W2013643406","https://openalex.org/W2027972911","https://openalex.org/W2157978810","https://openalex.org/W2597809628","https://openalex.org/W2149404148"],"abstract_inverted_index":{"A":[0,47],"novel":[1,116],"efficient":[2,28],"hardware":[3,19,74,92,117],"architecture":[4,75,118],"to":[5,58,89,111],"optimize":[6],"the":[7,72,90,95,100,115,126,131],"execution":[8],"time":[9],"of":[10,31,82,102,122,133],"dynamic":[11],"programming-based":[12],"(DP)":[13],"pairwise":[14],"sequence":[15,77],"alignment":[16,32,78],"algorithms":[17],"in":[18,43],"is":[20,23,50],"proposed.":[21],"It":[22],"realized":[24],"by":[25],"introducing":[26],"an":[27,54],"overlapped":[29],"scheduling":[30],"matrix":[33],"computation":[34],"and":[35],"substitution":[36],"coefficients'":[37],"pre-loading":[38],"onto":[39],"processing":[40],"elements":[41],"(PEs)":[42],"folded":[44],"systolic":[45],"arrays.":[46],"new":[48,73],"metric":[49],"also":[51],"proposed":[52],"as":[53],"independent":[55],"performance":[56],"evaluator":[57],"compare":[59],"different":[60,64],"core":[61],"implementations":[62],"on":[63],"FPGA":[65],"platforms":[66],"fairly.":[67],"Implementation":[68],"results":[69],"show":[70],"that":[71],"for":[76,108,138],"achieves":[79,119],"a":[80,120],"minimum":[81,121],"40":[83],"percent":[84,106],"area":[85],"normalized":[86],"speed-up":[87,96,107,127,137],"compared":[88],"state-of-the-art":[91],"implementation,":[93],"with":[94,99,125,130],"growing":[97,128],"linearly":[98,129],"number":[101,132],"folds":[103,134],"e.g.":[104,135],"120":[105],"16-fold.":[109],"Compared":[110],"equivalent":[112],"software":[113],"implementations,":[114],"103x":[123],"speed-up,":[124],"140x":[136],"20-fold.":[139]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}
