{"id":"https://openalex.org/W2005789225","doi":"https://doi.org/10.1145/2380445.2380473","title":"DIMSim","display_name":"DIMSim","publication_year":2012,"publication_date":"2012-10-07","ids":{"openalex":"https://openalex.org/W2005789225","doi":"https://doi.org/10.1145/2380445.2380473","mag":"2005789225"},"language":"en","primary_location":{"id":"doi:10.1145/2380445.2380473","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2380445.2380473","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5036263624","display_name":"Mohammad Shihabul Haque","orcid":"https://orcid.org/0000-0002-5977-8533"},"institutions":[{"id":"https://openalex.org/I165932596","display_name":"National University of Singapore","ror":"https://ror.org/01tgyzw49","country_code":"SG","type":"education","lineage":["https://openalex.org/I165932596"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Mohammad Shihabul Haque","raw_affiliation_strings":["National University of Singapore, Singapore, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National University of Singapore, Singapore, Singapore","institution_ids":["https://openalex.org/I165932596"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058096999","display_name":"Roshan Ragel","orcid":"https://orcid.org/0000-0002-4511-2335"},"institutions":[{"id":"https://openalex.org/I111199411","display_name":"University of Peradeniya","ror":"https://ror.org/025h79t26","country_code":"LK","type":"education","lineage":["https://openalex.org/I111199411"]}],"countries":["LK"],"is_corresponding":false,"raw_author_name":"Roshan Ragel","raw_affiliation_strings":["University of Peradeniya, Peradeniya, Sri Lanka","University of Peradeniya, Peradeniya, Sri Lanka#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Peradeniya, Peradeniya, Sri Lanka","institution_ids":["https://openalex.org/I111199411"]},{"raw_affiliation_string":"University of Peradeniya, Peradeniya, Sri Lanka#TAB#","institution_ids":["https://openalex.org/I111199411"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003264025","display_name":"Angelo Ambrose","orcid":null},"institutions":[{"id":"https://openalex.org/I31746571","display_name":"UNSW Sydney","ror":"https://ror.org/03r8z3t63","country_code":"AU","type":"education","lineage":["https://openalex.org/I31746571"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"Angelo Ambrose","raw_affiliation_strings":["University of New South Wales, Sydney, Australia","University of New South wales, Sydney, Australia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of New South Wales, Sydney, Australia","institution_ids":["https://openalex.org/I31746571"]},{"raw_affiliation_string":"University of New South wales, Sydney, Australia","institution_ids":["https://openalex.org/I31746571"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5107748825","display_name":"Swarnalatha Radhakrishnan","orcid":"https://orcid.org/0000-0001-9583-8700"},"institutions":[{"id":"https://openalex.org/I111199411","display_name":"University of Peradeniya","ror":"https://ror.org/025h79t26","country_code":"LK","type":"education","lineage":["https://openalex.org/I111199411"]}],"countries":["LK"],"is_corresponding":false,"raw_author_name":"Swarnalatha Radhakrishnan","raw_affiliation_strings":["University of Peradeniya, Peradeniya, Sri Lanka","University of Peradeniya, Peradeniya, Sri Lanka#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Peradeniya, Peradeniya, Sri Lanka","institution_ids":["https://openalex.org/I111199411"]},{"raw_affiliation_string":"University of Peradeniya, Peradeniya, Sri Lanka#TAB#","institution_ids":["https://openalex.org/I111199411"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5030042327","display_name":"Sri Parameswaran","orcid":"https://orcid.org/0000-0003-0435-9080"},"institutions":[{"id":"https://openalex.org/I31746571","display_name":"UNSW Sydney","ror":"https://ror.org/03r8z3t63","country_code":"AU","type":"education","lineage":["https://openalex.org/I31746571"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"Sri Parameswaran","raw_affiliation_strings":["University of New South Wales, Sydney, Australia","University of New South wales, Sydney, Australia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of New South Wales, Sydney, Australia","institution_ids":["https://openalex.org/I31746571"]},{"raw_affiliation_string":"University of New South wales, Sydney, Australia","institution_ids":["https://openalex.org/I31746571"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"151","last_page":"160"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8868472576141357},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.7298405170440674},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.6198365092277527},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.5600834488868713},{"id":"https://openalex.org/keywords/mpsoc","display_name":"MPSoC","score":0.5557132959365845},{"id":"https://openalex.org/keywords/dimensioning","display_name":"Dimensioning","score":0.5443418025970459},{"id":"https://openalex.org/keywords/memory-hierarchy","display_name":"Memory hierarchy","score":0.5366736054420471},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.509407103061676},{"id":"https://openalex.org/keywords/cache-invalidation","display_name":"Cache invalidation","score":0.46744808554649353},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.44405123591423035},{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.4434264898300171},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.38757625222206116},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.38690754771232605},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1522885262966156}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8868472576141357},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.7298405170440674},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.6198365092277527},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.5600834488868713},{"id":"https://openalex.org/C2777187653","wikidata":"https://www.wikidata.org/wiki/Q975106","display_name":"MPSoC","level":3,"score":0.5557132959365845},{"id":"https://openalex.org/C89714869","wikidata":"https://www.wikidata.org/wiki/Q2280470","display_name":"Dimensioning","level":2,"score":0.5443418025970459},{"id":"https://openalex.org/C2778100165","wikidata":"https://www.wikidata.org/wiki/Q1589327","display_name":"Memory hierarchy","level":3,"score":0.5366736054420471},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.509407103061676},{"id":"https://openalex.org/C25536678","wikidata":"https://www.wikidata.org/wiki/Q5015977","display_name":"Cache invalidation","level":5,"score":0.46744808554649353},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.44405123591423035},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.4434264898300171},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.38757625222206116},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.38690754771232605},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1522885262966156},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C146978453","wikidata":"https://www.wikidata.org/wiki/Q3798668","display_name":"Aerospace engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2380445.2380473","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2380445.2380473","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320320965","display_name":"University of New South Wales","ror":"https://ror.org/03r8z3t63"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W1492601037","https://openalex.org/W1555915743","https://openalex.org/W1986546446","https://openalex.org/W1992763756","https://openalex.org/W1993988399","https://openalex.org/W2015937460","https://openalex.org/W2016842024","https://openalex.org/W2022740893","https://openalex.org/W2032142237","https://openalex.org/W2050441245","https://openalex.org/W2058218638","https://openalex.org/W2061075966","https://openalex.org/W2064037464","https://openalex.org/W2065797523","https://openalex.org/W2079555365","https://openalex.org/W2088775661","https://openalex.org/W2090590416","https://openalex.org/W2104816779","https://openalex.org/W2108611786","https://openalex.org/W2115610814","https://openalex.org/W2120429086","https://openalex.org/W2121191383","https://openalex.org/W2136452714","https://openalex.org/W2158924248","https://openalex.org/W2166586055","https://openalex.org/W2725179571","https://openalex.org/W3015113183"],"related_works":["https://openalex.org/W2350993697","https://openalex.org/W2363769136","https://openalex.org/W2734782074","https://openalex.org/W3085471909","https://openalex.org/W2369103246","https://openalex.org/W2098406302","https://openalex.org/W2031173804","https://openalex.org/W2803610590","https://openalex.org/W2114386333","https://openalex.org/W1967490696"],"abstract_inverted_index":{"It":[0],"is":[1,66,181],"of":[2,48,62,220,229,265],"critical":[3],"importance":[4],"to":[5,13,28,40,44,68,86,96,100,104,145,252,272,286],"satisfy":[6,29,101,253],"deadline":[7,61],"requirements":[8],"for":[9,121,127,183],"an":[10,63,191,203],"embedded":[11,26],"application":[12,209],"avoid":[14],"undesired":[15],"outcomes.":[16],"Multiprocessor":[17],"System-on-Chips":[18],"(MPSoCs)":[19],"play":[20],"a":[21,109,142,146,157,184,263],"vital":[22],"role":[23],"in":[24,140,169,190],"contemporary":[25],"devices":[27],"timing":[30,46,227],"deadlines.":[31],"Such":[32],"MPSoCs":[33],"include":[34],"two-level":[35,149,185],"cache":[36,90,113,124,150,188,284],"hierarchies":[37],"which":[38,81],"have":[39],"be":[41,76,84,97],"dimensioned":[42],"carefully":[43],"support":[45],"deadlines":[47],"the":[49,60,71,88,93,102,116,123,128,133,179,194,198,237,254,278,289],"application(s)":[50],"while":[51],"consuming":[52],"minimum":[53,57],"area":[54],"and":[55,138,164,222,225,231,269],"therefore":[56],"power.":[58],"Given":[59],"application,":[64],"it":[65],"possible":[67],"systematically":[69],"derive":[70],"maximum":[72],"time":[73,103],"that":[74],"could":[75],"spent":[77],"on":[78,207,234,297],"memory":[79,267],"accesses":[80],"can":[82],"then":[83],"used":[85,270],"dimension":[87],"suitable":[89],"sizes.":[91],"As":[92],"dimensioning":[94,180],"has":[95],"done":[98],"rapidly":[99],"market":[105],"requirement,":[106],"we":[107,131,176,261],"choose":[108],"well":[110],"acclaimed":[111],"rapid":[112,195],"simulation":[114,160,196],"strategy,":[115],"single-pass":[117,143],"trace":[118],"driven":[119],"simulation,":[120],"estimating":[122],"dimensions.":[125],"Therefore,":[126],"first":[129],"time,":[130,293],"address":[132],"two":[134],"main":[135],"challenges,":[136],"coherency":[137],"scalability,":[139],"adapting":[141],"simulator":[144,250,282],"MPSoC":[147,218],"with":[148,215],"hierarchy.":[151],"The":[152,242],"challenges":[153],"are":[154,167,200,245],"addressed":[155],"through":[156],"modular":[158],"bottom-up":[159],"technique":[161],"where":[162],"L1":[163],"L2":[165],"simulations":[166],"handled":[168],"independent":[170],"communicating":[171],"modules.":[172],"In":[173,259],"this":[174],"paper,":[175],"present":[177],"how":[178],"performed":[182],"inclusive":[186],"data":[187,239,256,291],"hierarchy":[189],"MPSoC.":[192],"With":[193],"proposed,":[197],"estimations":[199],"suggested":[201],"within":[202],"hour":[204],"(worst":[205],"case":[206],"considered":[208],"benchmarks).":[210],"We":[211],"experimented":[212],"our":[213,249,275,281],"approach":[214],"task":[216],"based":[217],"implementations":[219],"JPEG":[221],"H264":[223],"benchmarks":[224],"achieved":[226],"deviations":[228],"16.1%":[230],"7.2%":[232],"respectively":[233],"average":[235],"against":[236],"requested":[238,255,290],"access":[240,257,292],"times.":[241],"deviation":[243],"numbers":[244],"always":[246,287],"positive":[247],"meaning":[248],"guarantees":[251],"time.":[258],"addition,":[260],"generated":[262],"set":[264],"synthetic":[266,279],"traces":[268],"them":[271],"extensively":[273],"analyse":[274],"simulator.":[276],"For":[277],"traces,":[280],"provides":[283],"sizes":[285],"guarantee":[288],"deviating":[294],"below":[295],"14.5%":[296],"average.":[298]},"counts_by_year":[{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":3}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2016-06-24T00:00:00"}
