{"id":"https://openalex.org/W2083347118","doi":"https://doi.org/10.1145/2348839.2348855","title":"Fast Statistical Full-Chip Leakage Analysis for Nanometer VLSI Systems","display_name":"Fast Statistical Full-Chip Leakage Analysis for Nanometer VLSI Systems","publication_year":2012,"publication_date":"2012-10-01","ids":{"openalex":"https://openalex.org/W2083347118","doi":"https://doi.org/10.1145/2348839.2348855","mag":"2083347118"},"language":"en","primary_location":{"id":"doi:10.1145/2348839.2348855","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2348839.2348855","pdf_url":null,"source":{"id":"https://openalex.org/S105046310","display_name":"ACM Transactions on Design Automation of Electronic Systems","issn_l":"1084-4309","issn":["1084-4309","1557-7309"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Design Automation of Electronic Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5008663892","display_name":"Ruijing Shen","orcid":null},"institutions":[{"id":"https://openalex.org/I103635307","display_name":"University of California, Riverside","ror":"https://ror.org/03nawhv43","country_code":"US","type":"education","lineage":["https://openalex.org/I103635307"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Ruijing Shen","raw_affiliation_strings":["University of California at Riverside","University of California, at Riverside"],"affiliations":[{"raw_affiliation_string":"University of California at Riverside","institution_ids":["https://openalex.org/I103635307"]},{"raw_affiliation_string":"University of California, at Riverside","institution_ids":["https://openalex.org/I103635307"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058844682","display_name":"Sheldon X.-D. Tan","orcid":"https://orcid.org/0000-0003-2119-6869"},"institutions":[{"id":"https://openalex.org/I103635307","display_name":"University of California, Riverside","ror":"https://ror.org/03nawhv43","country_code":"US","type":"education","lineage":["https://openalex.org/I103635307"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sheldon X.-D. Tan","raw_affiliation_strings":["University of California at Riverside","University of California, at Riverside"],"affiliations":[{"raw_affiliation_string":"University of California at Riverside","institution_ids":["https://openalex.org/I103635307"]},{"raw_affiliation_string":"University of California, at Riverside","institution_ids":["https://openalex.org/I103635307"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5009768180","display_name":"Hai Wang","orcid":"https://orcid.org/0000-0003-2789-9530"},"institutions":[{"id":"https://openalex.org/I103635307","display_name":"University of California, Riverside","ror":"https://ror.org/03nawhv43","country_code":"US","type":"education","lineage":["https://openalex.org/I103635307"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hai Wang","raw_affiliation_strings":["University of California at Riverside","University of California, at Riverside"],"affiliations":[{"raw_affiliation_string":"University of California at Riverside","institution_ids":["https://openalex.org/I103635307"]},{"raw_affiliation_string":"University of California, at Riverside","institution_ids":["https://openalex.org/I103635307"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5030156276","display_name":"Jinjun Xiong","orcid":"https://orcid.org/0000-0002-2620-4859"},"institutions":[{"id":"https://openalex.org/I4210114115","display_name":"IBM Research - Thomas J. Watson Research Center","ror":"https://ror.org/0265w5591","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jinjun Xiong","raw_affiliation_strings":["IBM Thomas J. Watson Research Center","IBM Thomas J. watson Research Center"],"affiliations":[{"raw_affiliation_string":"IBM Thomas J. Watson Research Center","institution_ids":["https://openalex.org/I4210114115"]},{"raw_affiliation_string":"IBM Thomas J. watson Research Center","institution_ids":["https://openalex.org/I4210114115"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5008663892"],"corresponding_institution_ids":["https://openalex.org/I103635307"],"apc_list":null,"apc_paid":null,"fwci":0.2455,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.61067595,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"17","issue":"4","first_page":"1","last_page":"19"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6809770464897156},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.6229683756828308},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5266180634498596},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.5191358923912048},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.4469192326068878},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.43092668056488037},{"id":"https://openalex.org/keywords/standard-cell","display_name":"Standard cell","score":0.42971470952033997},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.42406630516052246},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.28298813104629517},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.25313282012939453},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.1820535957813263},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.17917880415916443}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6809770464897156},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.6229683756828308},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5266180634498596},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5191358923912048},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.4469192326068878},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.43092668056488037},{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.42971470952033997},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.42406630516052246},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.28298813104629517},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.25313282012939453},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.1820535957813263},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.17917880415916443},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2348839.2348855","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2348839.2348855","pdf_url":null,"source":{"id":"https://openalex.org/S105046310","display_name":"ACM Transactions on Design Automation of Electronic Systems","issn_l":"1084-4309","issn":["1084-4309","1557-7309"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Design Automation of Electronic Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G5878335757","display_name":null,"funder_award_id":"CCF-1017090OISE-1051797CCF-1116882OISE-1130402","funder_id":"https://openalex.org/F4320337387","funder_display_name":"Division of Computing and Communication Foundations"},{"id":"https://openalex.org/G7100310169","display_name":null,"funder_award_id":"CCF-1017090OISE-1051797CCF-1116882OISE-1130402","funder_id":"https://openalex.org/F4320337370","funder_display_name":"Office of International Science and Engineering"}],"funders":[{"id":"https://openalex.org/F4320337370","display_name":"Office of International Science and Engineering","ror":"https://ror.org/01k638r21"},{"id":"https://openalex.org/F4320337387","display_name":"Division of Computing and Communication Foundations","ror":"https://ror.org/01mng8331"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":23,"referenced_works":["https://openalex.org/W1538934584","https://openalex.org/W1572287951","https://openalex.org/W1846979026","https://openalex.org/W1994620586","https://openalex.org/W2075059680","https://openalex.org/W2101203558","https://openalex.org/W2103455761","https://openalex.org/W2104042124","https://openalex.org/W2110288367","https://openalex.org/W2121437951","https://openalex.org/W2125892790","https://openalex.org/W2130278895","https://openalex.org/W2131633906","https://openalex.org/W2134467098","https://openalex.org/W2139472201","https://openalex.org/W2142356306","https://openalex.org/W2148575734","https://openalex.org/W2150283124","https://openalex.org/W2166481560","https://openalex.org/W2168356039","https://openalex.org/W2312417930","https://openalex.org/W2499148791","https://openalex.org/W4214626551"],"related_works":["https://openalex.org/W2103645363","https://openalex.org/W2072989701","https://openalex.org/W1738647919","https://openalex.org/W2132842408","https://openalex.org/W3000179092","https://openalex.org/W2050511294","https://openalex.org/W1986774039","https://openalex.org/W2118321428","https://openalex.org/W2167785622","https://openalex.org/W3005558969"],"abstract_inverted_index":{"In":[0,72],"this":[1,73],"article,":[2],"we":[3,159],"present":[4],"a":[5,45,138,161,184,187,189,218,254],"new":[6,20,190],"full-chip":[7],"statistical":[8,166,191,213],"leakage":[9,127,136,176,192,214,231,236,298],"estimation":[10],"considering":[11],"the":[12,35,56,62,68,87,100,125,129,148,211,247,270,278,288,296],"spatial":[13,69,103],"correlation":[14,70,104,107],"condition":[15,101],"(strong":[16],"or":[17,233],"weak).":[18],"The":[19,41,134,223,238],"algorithm":[21,43,206,249],"can":[22,141],"deliver":[23],"linear":[24,114],"time,":[25],"O":[26],"(":[27],"N":[28,33],"),":[29],"time":[30,115],"complexity,":[31],"where":[32],"is":[34,65,78,96,199,207,250],"number":[36,88,120],"of":[37,47,89,102,119,121,137,150,171,174,181,235,265],"grids":[38],"on":[39,183,229],"chip.":[40,185],"proposed":[42,208,224,248,256],"adopts":[44],"set":[46],"uncorrelated":[48],"virtual":[49,82],"variables":[50,60,83],"over":[51,269,295],"grid":[52,94,156],"cells":[53,91],"to":[54,99,108,113,164,209],"represent":[55],"original":[57],"physical":[58,76],"random":[59],"and":[61,262],"cell":[63,95],"size":[64],"determined":[66],"by":[67,81,128,144],"length.":[71],"way,":[74],"each":[75,93,155,169],"variable":[77],"always":[79],"represented":[80],"locally.":[84],"We":[85,123,286],"prove":[86],"neighbor":[90],"for":[92,168,177,300],"not":[97],"related":[98],"(from":[105],"no":[106,227],"100%":[109],"correlated),":[110],"which":[111],"leads":[112],"complexity":[116],"in":[117,154,194,242],"terms":[118],"gates.":[122],"compute":[124],"gate":[126,172,182],"orthogonal":[130,152],"polynomials-based":[131],"collocation":[132],"method.":[133,273],"total":[135],"whole":[139],"chip":[140],"be":[142],"computed":[143],"simply":[145],"summing":[146],"up":[147],"coefficients":[149],"corresponding":[151],"polynomials":[153],"cell.":[157],"Furthermore,":[158,202],"develop":[160],"look-up":[162],"table":[163],"cache":[165],"information":[167,215],"type":[170],"instead":[173],"calculating":[175],"every":[178],"single":[179],"instance":[180],"As":[186],"result,":[188],"characterization":[193],"Standard":[195],"Cell":[196],"Library":[197],"(SCL)":[198],"put":[200],"forward.":[201],"an":[203],"incremental":[204,279,289],"analysis":[205,280,290,299],"update":[210],"chip-level":[212],"efficiently":[216],"after":[217],"few":[219],"changes":[220],"are":[221],"made.":[222],"method":[225,258],"has":[226],"restrictions":[228],"static":[230],"models,":[232],"types":[234],"distributions.":[237],"large":[239],"circuit":[240],"examples":[241],"45nm":[243],"CMOS":[244],"process":[245],"demonstrate":[246],"1000X":[251],"faster":[252],"than":[253],"recently":[255],"grid-based":[257],"with":[259],"similar":[260],"accuracy":[261],"many":[263],"orders":[264],"magnitude":[266],"times":[267],"speedup":[268,294],"Monte":[271],"Carlo":[272],"Experimental":[274],"results":[275],"also":[276],"show":[277],"provides":[281],"about":[282],"10X":[283],"further":[284],"speedup.":[285],"expect":[287],"could":[291],"achieve":[292],"more":[293],"full":[297],"larger":[301],"problem":[302],"sizes.":[303]},"counts_by_year":[{"year":2019,"cited_by_count":3},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
