{"id":"https://openalex.org/W2112413572","doi":"https://doi.org/10.1145/2345396.2345575","title":"Hardware-software co-design of AES on FPGA","display_name":"Hardware-software co-design of AES on FPGA","publication_year":2012,"publication_date":"2012-08-03","ids":{"openalex":"https://openalex.org/W2112413572","doi":"https://doi.org/10.1145/2345396.2345575","mag":"2112413572"},"language":"en","primary_location":{"id":"doi:10.1145/2345396.2345575","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2345396.2345575","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the International Conference on Advances in Computing, Communications and Informatics","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103543183","display_name":"Saambhavi Baskaran","orcid":null},"institutions":[{"id":"https://openalex.org/I65181880","display_name":"Indian Institute of Technology Hyderabad","ror":"https://ror.org/01j4v3x97","country_code":"IN","type":"education","lineage":["https://openalex.org/I65181880"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Saambhavi Baskaran","raw_affiliation_strings":["Indian Institute of Technology Hyderabad, Medak, Hyderabad","Indian Institute of Technology Hyderabad, Medak, Hyderabad#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Hyderabad, Medak, Hyderabad","institution_ids":["https://openalex.org/I65181880"]},{"raw_affiliation_string":"Indian Institute of Technology Hyderabad, Medak, Hyderabad#TAB#","institution_ids":["https://openalex.org/I65181880"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5069669674","display_name":"P. Rajalakshmi","orcid":"https://orcid.org/0000-0002-7252-6728"},"institutions":[{"id":"https://openalex.org/I65181880","display_name":"Indian Institute of Technology Hyderabad","ror":"https://ror.org/01j4v3x97","country_code":"IN","type":"education","lineage":["https://openalex.org/I65181880"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Pachamuthu Rajalakshmi","raw_affiliation_strings":["Indian Institute of Technology Hyderabad, Medak, Hyderabad","Indian Institute of Technology Hyderabad, Medak, Hyderabad#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Hyderabad, Medak, Hyderabad","institution_ids":["https://openalex.org/I65181880"]},{"raw_affiliation_string":"Indian Institute of Technology Hyderabad, Medak, Hyderabad#TAB#","institution_ids":["https://openalex.org/I65181880"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I65181880"],"apc_list":null,"apc_paid":null,"fwci":2.1747,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.8904102,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1118","last_page":"1122"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11017","display_name":"Chaos-based Image/Signal Encryption","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11130","display_name":"Coding theory and cryptography","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/microblaze","display_name":"MicroBlaze","score":0.9347012639045715},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.9019486904144287},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.722359299659729},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6916043758392334},{"id":"https://openalex.org/keywords/fpga-prototype","display_name":"FPGA prototype","score":0.5833109021186829},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5622830390930176},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.548206090927124},{"id":"https://openalex.org/keywords/spartan","display_name":"Spartan","score":0.49768927693367004},{"id":"https://openalex.org/keywords/advanced-encryption-standard","display_name":"Advanced Encryption Standard","score":0.4968169033527374},{"id":"https://openalex.org/keywords/byte","display_name":"Byte","score":0.4522250294685364},{"id":"https://openalex.org/keywords/encryption","display_name":"Encryption","score":0.42297565937042236},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.12761330604553223}],"concepts":[{"id":"https://openalex.org/C2777575374","wikidata":"https://www.wikidata.org/wiki/Q1644704","display_name":"MicroBlaze","level":3,"score":0.9347012639045715},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.9019486904144287},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.722359299659729},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6916043758392334},{"id":"https://openalex.org/C203864433","wikidata":"https://www.wikidata.org/wiki/Q5426992","display_name":"FPGA prototype","level":3,"score":0.5833109021186829},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5622830390930176},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.548206090927124},{"id":"https://openalex.org/C10689553","wikidata":"https://www.wikidata.org/wiki/Q405953","display_name":"Spartan","level":3,"score":0.49768927693367004},{"id":"https://openalex.org/C94520183","wikidata":"https://www.wikidata.org/wiki/Q190746","display_name":"Advanced Encryption Standard","level":3,"score":0.4968169033527374},{"id":"https://openalex.org/C43364308","wikidata":"https://www.wikidata.org/wiki/Q8799","display_name":"Byte","level":2,"score":0.4522250294685364},{"id":"https://openalex.org/C148730421","wikidata":"https://www.wikidata.org/wiki/Q141090","display_name":"Encryption","level":2,"score":0.42297565937042236},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.12761330604553223}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/2345396.2345575","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2345396.2345575","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the International Conference on Advances in Computing, Communications and Informatics","raw_type":"proceedings-article"},{"id":"pmh:oai:raiith.iith.ac.in:676","is_oa":false,"landing_page_url":null,"pdf_url":null,"source":{"id":"https://openalex.org/S4306400292","display_name":"Research Archive of Indian Institute of Technology Hyderabad (Indian Institute of Technology Hyderabad)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I65181880","host_organization_name":"Indian Institute of Technology Hyderabad","host_organization_lineage":["https://openalex.org/I65181880"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"acceptedVersion","is_accepted":true,"is_published":false,"raw_source_name":"","raw_type":"Conference or Workshop Item"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W2075054028","https://openalex.org/W2101286902","https://openalex.org/W2132280197","https://openalex.org/W2150250564","https://openalex.org/W2151948794","https://openalex.org/W2159283580","https://openalex.org/W2162626712","https://openalex.org/W2163769417","https://openalex.org/W4244570301"],"related_works":["https://openalex.org/W2033874290","https://openalex.org/W2543352907","https://openalex.org/W2550887723","https://openalex.org/W1975477838","https://openalex.org/W1968760107","https://openalex.org/W2950551575","https://openalex.org/W2624134246","https://openalex.org/W2261632671","https://openalex.org/W1782712186","https://openalex.org/W2112413572"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,28],"compact":[4],"hardware-software":[5],"co-design":[6],"of":[7,37,55,79,110],"Advanced":[8],"Encryption":[9],"Standard":[10],"(AES)":[11],"on":[12,87],"the":[13,38,53,56,60,70,73,76,84,111],"field":[14],"programmable":[15],"gate":[16],"arrays":[17],"(FPGA)":[18],"designed":[19,51],"for":[20,44],"low-cost":[21,112],"embedded":[22],"systems.":[23],"The":[24,33,47,94],"design":[25,98],"uses":[26],"MicroBlaze,":[27],"soft-core":[29],"processor":[30,57,71],"from":[31],"Xilinx.":[32],"computationally":[34],"intensive":[35],"operations":[36],"AES":[39,74,85,96],"are":[40],"implemented":[41,65],"in":[42,72,104],"hardware":[43,63],"better":[45],"speed.":[46],"sub-byte":[48],"calculation":[49],"is":[50,89,99,108],"with":[52],"help":[54],"carrying":[58],"out":[59],"calculations":[61],"using":[62,66,101],"blocks":[64],"FPGA.":[67],"By":[68],"incorporating":[69],"design,":[75],"total":[77],"number":[78],"slices":[80,103],"required":[81],"to":[82,91],"implement":[83],"algorithm":[86],"FPGA":[88],"proved":[90],"be":[92],"reduced.":[93],"entire":[95],"system":[97],"validated":[100],"460":[102],"Spartan-3E":[105],"XC3S500E,":[106],"which":[107],"one":[109],"FPGAs.":[113]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2015,"cited_by_count":1},{"year":2013,"cited_by_count":4}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
