{"id":"https://openalex.org/W2005242923","doi":"https://doi.org/10.1145/2333660.2333707","title":"TapeCache","display_name":"TapeCache","publication_year":2012,"publication_date":"2012-07-30","ids":{"openalex":"https://openalex.org/W2005242923","doi":"https://doi.org/10.1145/2333660.2333707","mag":"2005242923"},"language":"en","primary_location":{"id":"doi:10.1145/2333660.2333707","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2333660.2333707","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2012 ACM/IEEE international symposium on Low power electronics and design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5045219356","display_name":"Rangharajan Venkatesan","orcid":null},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Rangharajan Venkatesan","raw_affiliation_strings":["Purdue University, West Lafayette, IN, USA"],"affiliations":[{"raw_affiliation_string":"Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5014678802","display_name":"Vivek Kozhikkottu","orcid":null},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Vivek Kozhikkottu","raw_affiliation_strings":["Purdue University, West Lafayette, IN, USA"],"affiliations":[{"raw_affiliation_string":"Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085682261","display_name":"Charles Augustine","orcid":"https://orcid.org/0000-0001-8892-6286"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Charles Augustine","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA","Intel Corporation, , Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, , Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5091408102","display_name":"Arijit Raychowdhury","orcid":"https://orcid.org/0000-0001-8391-0576"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Arijit Raychowdhury","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA","Intel Corporation, , Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, , Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031161187","display_name":"Kaushik Roy","orcid":"https://orcid.org/0009-0002-3375-2877"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kaushik Roy","raw_affiliation_strings":["Purdue University, West Lafayette, IN, USA"],"affiliations":[{"raw_affiliation_string":"Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5065766721","display_name":"Anand Raghunathan","orcid":"https://orcid.org/0000-0002-4624-564X"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Anand Raghunathan","raw_affiliation_strings":["Purdue University, West Lafayette, IN, USA"],"affiliations":[{"raw_affiliation_string":"Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5045219356"],"corresponding_institution_ids":["https://openalex.org/I219193219"],"apc_list":null,"apc_paid":null,"fwci":9.8849,"has_fulltext":false,"cited_by_count":141,"citation_normalized_percentile":{"value":0.98676515,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":100},"biblio":{"volume":null,"issue":null,"first_page":"185","last_page":"190"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10049","display_name":"Magnetic properties of thin films","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/3107","display_name":"Atomic and Molecular Physics, and Optics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10049","display_name":"Magnetic properties of thin films","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/3107","display_name":"Atomic and Molecular Physics, and Optics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8055098652839661},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.630135178565979},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.6217425465583801},{"id":"https://openalex.org/keywords/magnetoresistive-random-access-memory","display_name":"Magnetoresistive random-access memory","score":0.5877335071563721},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5416224002838135},{"id":"https://openalex.org/keywords/write-buffer","display_name":"Write buffer","score":0.537599503993988},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.5102782249450684},{"id":"https://openalex.org/keywords/performance-improvement","display_name":"Performance improvement","score":0.48881861567497253},{"id":"https://openalex.org/keywords/racetrack-memory","display_name":"Racetrack memory","score":0.48487457633018494},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.48124265670776367},{"id":"https://openalex.org/keywords/access-time","display_name":"Access time","score":0.4646790325641632},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4146312475204468},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.41162610054016113},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.37802016735076904},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.34634849429130554},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.3368655741214752},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.2717595100402832},{"id":"https://openalex.org/keywords/cache-coloring","display_name":"Cache coloring","score":0.24113762378692627},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.21602299809455872},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.09418901801109314}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8055098652839661},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.630135178565979},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.6217425465583801},{"id":"https://openalex.org/C46891859","wikidata":"https://www.wikidata.org/wiki/Q1061546","display_name":"Magnetoresistive random-access memory","level":3,"score":0.5877335071563721},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5416224002838135},{"id":"https://openalex.org/C89089495","wikidata":"https://www.wikidata.org/wiki/Q8038418","display_name":"Write buffer","level":5,"score":0.537599503993988},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.5102782249450684},{"id":"https://openalex.org/C2778915421","wikidata":"https://www.wikidata.org/wiki/Q3643177","display_name":"Performance improvement","level":2,"score":0.48881861567497253},{"id":"https://openalex.org/C43363307","wikidata":"https://www.wikidata.org/wiki/Q1651623","display_name":"Racetrack memory","level":5,"score":0.48487457633018494},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.48124265670776367},{"id":"https://openalex.org/C194080101","wikidata":"https://www.wikidata.org/wiki/Q46306","display_name":"Access time","level":2,"score":0.4646790325641632},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4146312475204468},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.41162610054016113},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.37802016735076904},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.34634849429130554},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.3368655741214752},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.2717595100402832},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.24113762378692627},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.21602299809455872},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.09418901801109314},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2333660.2333707","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2333660.2333707","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2012 ACM/IEEE international symposium on Low power electronics and design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8999999761581421}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1479699553","https://openalex.org/W1968480751","https://openalex.org/W1968686941","https://openalex.org/W1971543343","https://openalex.org/W1981443800","https://openalex.org/W2003390915","https://openalex.org/W2033188264","https://openalex.org/W2048588974","https://openalex.org/W2065558271","https://openalex.org/W2080739090","https://openalex.org/W2104225326","https://openalex.org/W2109640656","https://openalex.org/W2116826022","https://openalex.org/W2136316949","https://openalex.org/W2142276919","https://openalex.org/W2146245483","https://openalex.org/W2147539449","https://openalex.org/W2148831941"],"related_works":["https://openalex.org/W2956081036","https://openalex.org/W4211117037","https://openalex.org/W2107922524","https://openalex.org/W2128922810","https://openalex.org/W4387251459","https://openalex.org/W3015744189","https://openalex.org/W1993178305","https://openalex.org/W4372325124","https://openalex.org/W2041536546","https://openalex.org/W1533479501"],"abstract_inverted_index":{"Domain":[0],"Wall":[1],"Memory":[2],"(DWM)":[3],"is":[4],"a":[5,24,49,95,105,114,131,151,154],"recently":[6],"developed":[7],"spin-based":[8,74],"memory":[9,35,75],"technology":[10],"in":[11,32,58,94,125,150,165,196],"which":[12],"several":[13],"bits":[14,92,149],"of":[15,23,112,157,171,178],"data":[16],"are":[17],"densely":[18],"packed":[19],"into":[20],"the":[21,91,123,141],"domains":[22],"ferromagnetic":[25],"wire.":[26],"DWM":[27,96,116],"has":[28],"shown":[29],"great":[30],"promise":[31],"enabling":[33],"non-volatile":[34],"with":[36,203],"unprecedented":[37],"density":[38,67],"and":[39,72,129,135,173,198],"high":[40],"energy":[41,169,201],"efficiency.":[42],"In":[43],"this":[44],"work,":[45],"we":[46],"propose":[47,104],"TapeCache,":[48,110],"first":[50],"attempt":[51],"to":[52,69,90,99,148,181,187],"employ":[53],"DWMs":[54,63],"as":[55,78,87],"last-level":[56],"caches":[57],"general":[59],"purpose":[60],"computing":[61],"platforms.":[62],"enable":[64],"much":[65],"higher":[66],"compared":[68,180],"SRAM,":[70],"DRAM,":[71],"other":[73],"technologies":[76],"such":[77,86],"STT-MRAM.":[79],"However,":[80],"they":[81],"also":[82],"pose":[83],"unique":[84],"challenges":[85],"serial":[88,146],"access":[89,101,147],"stored":[93],"cell,":[97],"leading":[98],"variable":[100],"latencies.":[102],"We":[103],"novel":[106],"circuit-architecture":[107],"co-design":[108],"for":[109,119],"consisting":[111],"(i)":[113],"multi-port":[115],"macro-cell":[117],"optimized":[118],"read":[120],"operations":[121],"considering":[122],"asymmetry":[124],"applications'":[126],"read/write":[127],"characteristics,":[128],"(ii)":[130],"new":[132],"cache":[133],"organization":[134],"suitable":[136],"management":[137],"policies":[138],"that":[139],"mitigate":[140],"performance":[142,176],"penalty":[143],"arising":[144],"from":[145],"macro-cell.":[152],"Over":[153],"wide":[155],"range":[156],"SPEC":[158],"2006":[159],"benchmarks,":[160],"TapeCache":[161,192],"achieves":[162],"7.8X":[163],"improvement":[164,170,177,195],"area,":[166],"an":[167,174,182,188],"average":[168,175,200],"7.3X,":[172],"1.2%":[179],"iso-capacity":[183,189],"SRAM":[184],"cache.":[185],"Compared":[186],"STT-MRAM":[190],"cache,":[191],"obtains":[193],"2.3X":[194],"area":[197],"1.4X":[199],"savings":[202],"virtually":[204],"identical":[205],"performance.":[206]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":7},{"year":2022,"cited_by_count":13},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":10},{"year":2019,"cited_by_count":20},{"year":2018,"cited_by_count":8},{"year":2017,"cited_by_count":11},{"year":2016,"cited_by_count":16},{"year":2015,"cited_by_count":24},{"year":2014,"cited_by_count":16},{"year":2013,"cited_by_count":6}],"updated_date":"2026-03-13T16:22:10.518609","created_date":"2016-06-24T00:00:00"}