{"id":"https://openalex.org/W1992063709","doi":"https://doi.org/10.1145/2333660.2333706","title":"Process variation aware data management for STT-RAM cache design","display_name":"Process variation aware data management for STT-RAM cache design","publication_year":2012,"publication_date":"2012-07-30","ids":{"openalex":"https://openalex.org/W1992063709","doi":"https://doi.org/10.1145/2333660.2333706","mag":"1992063709"},"language":"en","primary_location":{"id":"doi:10.1145/2333660.2333706","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2333660.2333706","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2012 ACM/IEEE international symposium on Low power electronics and design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103258530","display_name":"Zhenyu Sun","orcid":"https://orcid.org/0000-0002-6584-3629"},"institutions":[{"id":"https://openalex.org/I57206974","display_name":"New York University","ror":"https://ror.org/0190ak572","country_code":"US","type":"education","lineage":["https://openalex.org/I57206974"]},{"id":"https://openalex.org/I90965887","display_name":"SUNY Polytechnic Institute","ror":"https://ror.org/000fxgx19","country_code":"US","type":"education","lineage":["https://openalex.org/I90965887"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Zhenyu Sun","raw_affiliation_strings":["Polytechnic Institute of New York University, Brooklyn, NY, USA",", Polytechnic Institute of New York University, Brooklyn, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Polytechnic Institute of New York University, Brooklyn, NY, USA","institution_ids":["https://openalex.org/I90965887","https://openalex.org/I57206974"]},{"raw_affiliation_string":", Polytechnic Institute of New York University, Brooklyn, NY, USA","institution_ids":["https://openalex.org/I57206974"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066400911","display_name":"Xiuyuan Bi","orcid":"https://orcid.org/0000-0002-7401-6764"},"institutions":[{"id":"https://openalex.org/I57206974","display_name":"New York University","ror":"https://ror.org/0190ak572","country_code":"US","type":"education","lineage":["https://openalex.org/I57206974"]},{"id":"https://openalex.org/I90965887","display_name":"SUNY Polytechnic Institute","ror":"https://ror.org/000fxgx19","country_code":"US","type":"education","lineage":["https://openalex.org/I90965887"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Xiuyuan Bi","raw_affiliation_strings":["Polytechnic Institute of New York University, Brooklyn, NY, USA",", Polytechnic Institute of New York University, Brooklyn, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Polytechnic Institute of New York University, Brooklyn, NY, USA","institution_ids":["https://openalex.org/I90965887","https://openalex.org/I57206974"]},{"raw_affiliation_string":", Polytechnic Institute of New York University, Brooklyn, NY, USA","institution_ids":["https://openalex.org/I57206974"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100429403","display_name":"Hai Li","orcid":"https://orcid.org/0000-0003-3228-6544"},"institutions":[{"id":"https://openalex.org/I57206974","display_name":"New York University","ror":"https://ror.org/0190ak572","country_code":"US","type":"education","lineage":["https://openalex.org/I57206974"]},{"id":"https://openalex.org/I90965887","display_name":"SUNY Polytechnic Institute","ror":"https://ror.org/000fxgx19","country_code":"US","type":"education","lineage":["https://openalex.org/I90965887"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hai Li","raw_affiliation_strings":["Polytechnic Institute of New York University, Brooklyn, NY, USA",", Polytechnic Institute of New York University, Brooklyn, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Polytechnic Institute of New York University, Brooklyn, NY, USA","institution_ids":["https://openalex.org/I90965887","https://openalex.org/I57206974"]},{"raw_affiliation_string":", Polytechnic Institute of New York University, Brooklyn, NY, USA","institution_ids":["https://openalex.org/I57206974"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.9291,"has_fulltext":false,"cited_by_count":26,"citation_normalized_percentile":{"value":0.90559725,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"179","last_page":"184"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10049","display_name":"Magnetic properties of thin films","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/3107","display_name":"Atomic and Molecular Physics, and Optics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8202933669090271},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.703171968460083},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.5995224714279175},{"id":"https://openalex.org/keywords/data-retention","display_name":"Data retention","score":0.5990706086158752},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5819672346115112},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.5687234401702881},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.5202580690383911},{"id":"https://openalex.org/keywords/access-time","display_name":"Access time","score":0.5139762759208679},{"id":"https://openalex.org/keywords/data-access","display_name":"Data access","score":0.46917206048965454},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4410884380340576},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.4405677318572998},{"id":"https://openalex.org/keywords/page-cache","display_name":"Page cache","score":0.4180571138858795},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.41090795397758484},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3201448917388916},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2907613515853882},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.24376478791236877},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.16317281126976013}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8202933669090271},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.703171968460083},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.5995224714279175},{"id":"https://openalex.org/C2780866740","wikidata":"https://www.wikidata.org/wiki/Q5227345","display_name":"Data retention","level":2,"score":0.5990706086158752},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5819672346115112},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.5687234401702881},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.5202580690383911},{"id":"https://openalex.org/C194080101","wikidata":"https://www.wikidata.org/wiki/Q46306","display_name":"Access time","level":2,"score":0.5139762759208679},{"id":"https://openalex.org/C47487241","wikidata":"https://www.wikidata.org/wiki/Q5227230","display_name":"Data access","level":2,"score":0.46917206048965454},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4410884380340576},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.4405677318572998},{"id":"https://openalex.org/C36340418","wikidata":"https://www.wikidata.org/wiki/Q7124288","display_name":"Page cache","level":5,"score":0.4180571138858795},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.41090795397758484},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3201448917388916},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2907613515853882},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.24376478791236877},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.16317281126976013},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2333660.2333706","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2333660.2333706","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2012 ACM/IEEE international symposium on Low power electronics and design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.9100000262260437}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W1505220924","https://openalex.org/W1975904824","https://openalex.org/W1995771228","https://openalex.org/W2006291936","https://openalex.org/W2035607161","https://openalex.org/W2084007230","https://openalex.org/W2103126659","https://openalex.org/W2108048675","https://openalex.org/W2108453702","https://openalex.org/W2112704250","https://openalex.org/W2116826022","https://openalex.org/W2126372249","https://openalex.org/W2147503459","https://openalex.org/W2148831941","https://openalex.org/W2152491218","https://openalex.org/W2154392963","https://openalex.org/W2155551886","https://openalex.org/W3150611138","https://openalex.org/W4249254852","https://openalex.org/W4256248576","https://openalex.org/W6671695895"],"related_works":["https://openalex.org/W3165129262","https://openalex.org/W1979375376","https://openalex.org/W3166376649","https://openalex.org/W1920971936","https://openalex.org/W4288630056","https://openalex.org/W4206506422","https://openalex.org/W4315977482","https://openalex.org/W2063061014","https://openalex.org/W1605281289","https://openalex.org/W3138885233"],"abstract_inverted_index":{"The":[0,24,57],"spin-transfer":[1],"torque":[2],"random":[3],"access":[4,33,98,149,167],"memory":[5,44,113],"(STT-RAM)":[6],"has":[7],"gained":[8],"increasing":[9],"attentions":[10],"for":[11,59,101],"its":[12],"high":[13],"density,":[14],"fast":[15],"read":[16],"access,":[17],"zero":[18],"standby":[19],"power,":[20],"and":[21,35,82,132,138,179],"good":[22],"scalability.":[23],"recently":[25],"proposed":[26,170],"retention-relax":[27,60],"design":[28,61,88],"further":[29],"improves":[30],"STT-RAM":[31,55,87,103,121,163,183],"write":[32,117],"performance":[34,178],"makes":[36],"it":[37],"even":[38,63],"more":[39,64],"promising":[40],"as":[41],"an":[42],"on-chip":[43],"technology.":[45],"Nevertheless,":[46],"the":[47,52,72,107,147,161],"process":[48,75,93,125],"variations":[49,119],"could":[50],"affect":[51],"writability":[53],"of":[54,74,120,155,176,182,190],"cells.":[56],"situation":[58],"is":[62,143],"severe.":[65],"In":[66],"this":[67],"paper,":[68],"we":[69,91],"comprehensively":[70],"study":[71],"impact":[73],"variations,":[76],"including":[77],"those":[78],"from":[79],"both":[80],"CMOS":[81],"magnetic":[83],"technologies,":[84],"on":[85],"key":[86],"parameters.":[89],"Furthermore,":[90],"propose":[92],"variation":[94],"aware":[95],"nonuniform":[96,165],"cache":[97,104,166,184],"(PVA-NUCA)":[99],"technique":[100],"large":[102],"design.":[105],"Besides":[106],"varying":[108],"interconnect":[109],"latencies":[110],"determined":[111],"by":[112,124,153],"locations,":[114],"PVA-NUCA":[115,172],"compensates":[116],"time":[118],"cells":[122],"resulted":[123],"variations.":[126],"Two":[127],"algorithms,":[128],"namely,":[129],"conservative":[130],"promotion":[131],"aggressive":[133],"prediction,":[134],"have":[135],"been":[136],"introduced":[137],"evaluated.":[139],"A":[140],"conflict-reduction":[141],"mechanism":[142],"utilized":[144],"to":[145,160],"degrade":[146],"data":[148,157],"miss":[150],"rate":[151],"caused":[152],"conflicts":[154],"access-intensive":[156],"blocks.":[158],"Compared":[159],"traditional":[162],"dynamic":[164,171],"(DNUCA),":[168],"our":[169],"can":[173],"improve":[174],"25.29%":[175],"IPC":[177],"reduce":[180],"26.4%":[181],"energy":[185],"consumption,":[186],"with":[187],"<":[188],"1%":[189],"area":[191],"overhead.":[192]},"counts_by_year":[{"year":2024,"cited_by_count":2},{"year":2022,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":4},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":4},{"year":2014,"cited_by_count":3},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
