{"id":"https://openalex.org/W1988877888","doi":"https://doi.org/10.1145/2247684.2247688","title":"Can seqlocks get along with programming language memory models?","display_name":"Can seqlocks get along with programming language memory models?","publication_year":2012,"publication_date":"2012-06-11","ids":{"openalex":"https://openalex.org/W1988877888","doi":"https://doi.org/10.1145/2247684.2247688","mag":"1988877888"},"language":"en","primary_location":{"id":"doi:10.1145/2247684.2247688","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2247684.2247688","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2012 ACM SIGPLAN Workshop on Memory Systems Performance and Correctness","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111851229","display_name":"Hans\u2010J. Boehm","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Hans-J. Boehm","raw_affiliation_strings":["HP Laboratories"],"affiliations":[{"raw_affiliation_string":"HP Laboratories","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5111851229"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":4.0608,"has_fulltext":false,"cited_by_count":49,"citation_normalized_percentile":{"value":0.93835488,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"12","last_page":"20"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.9001195430755615},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.6281786561012268},{"id":"https://openalex.org/keywords/cache-coherence","display_name":"Cache coherence","score":0.588208794593811},{"id":"https://openalex.org/keywords/memory-model","display_name":"Memory model","score":0.5172761082649231},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.512174129486084},{"id":"https://openalex.org/keywords/synchronization","display_name":"Synchronization (alternating current)","score":0.5088244080543518},{"id":"https://openalex.org/keywords/lock","display_name":"Lock (firearm)","score":0.48912960290908813},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.41743776202201843},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.38941070437431335},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.26563504338264465},{"id":"https://openalex.org/keywords/shared-memory","display_name":"Shared memory","score":0.264486163854599}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.9001195430755615},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.6281786561012268},{"id":"https://openalex.org/C141917322","wikidata":"https://www.wikidata.org/wiki/Q1025017","display_name":"Cache coherence","level":5,"score":0.588208794593811},{"id":"https://openalex.org/C12186640","wikidata":"https://www.wikidata.org/wiki/Q6815743","display_name":"Memory model","level":3,"score":0.5172761082649231},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.512174129486084},{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.5088244080543518},{"id":"https://openalex.org/C174839445","wikidata":"https://www.wikidata.org/wiki/Q1134386","display_name":"Lock (firearm)","level":2,"score":0.48912960290908813},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.41743776202201843},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.38941070437431335},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.26563504338264465},{"id":"https://openalex.org/C133875982","wikidata":"https://www.wikidata.org/wiki/Q764810","display_name":"Shared memory","level":2,"score":0.264486163854599},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.0},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2247684.2247688","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2247684.2247688","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2012 ACM SIGPLAN Workshop on Memory Systems Performance and Correctness","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.46000000834465027,"display_name":"Quality Education","id":"https://metadata.un.org/sdg/4"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W6969004","https://openalex.org/W1482397304","https://openalex.org/W1488349677","https://openalex.org/W1967564401","https://openalex.org/W1998896266","https://openalex.org/W2054188664","https://openalex.org/W2054739713","https://openalex.org/W2085773946","https://openalex.org/W2132117132","https://openalex.org/W2138074470","https://openalex.org/W2142349608","https://openalex.org/W2152885346","https://openalex.org/W2160963348","https://openalex.org/W2164591206","https://openalex.org/W2364800968","https://openalex.org/W2405985696","https://openalex.org/W4234066571","https://openalex.org/W4251987281","https://openalex.org/W4256041698"],"related_works":["https://openalex.org/W118795575","https://openalex.org/W2036306661","https://openalex.org/W4291186713","https://openalex.org/W1965261831","https://openalex.org/W2953079396","https://openalex.org/W2104586517","https://openalex.org/W2107259556","https://openalex.org/W1517194951","https://openalex.org/W2160499017","https://openalex.org/W2115953580"],"abstract_inverted_index":{"Seqlocks":[0],"are":[1],"an":[2,60],"important":[3],"synchronization":[4,25],"mechanism":[5],"and":[6,32,84,126],"represent":[7],"a":[8,24,28,74,101],"significant":[9],"improvement":[10],"over":[11],"conventional":[12],"reader-writer":[13],"locks":[14],"in":[15,90],"some":[16],"contexts.":[17],"They":[18],"avoid":[19],"the":[20,42,54,80,87,93,114,122],"need":[21],"to":[22,134],"update":[23],"variable":[26],"during":[27],"reader":[29],"critical":[30,55],"section,":[31],"hence":[33],"improve":[34],"performance":[35],"by":[36],"avoiding":[37],"cache":[38],"coherence":[39],"misses":[40],"on":[41,49],"lock":[43],"object":[44],"itself.":[45],"Unfortunately,":[46],"they":[47],"rely":[48],"speculative":[50],"racing":[51],"loads":[52],"inside":[53],"section.":[56],"This":[57],"makes":[58],"them":[59],"interesting":[61],"problem":[62],"case":[63],"for":[64,103,121,132],"programming-language-level":[65],"memory":[66,82,123],"models":[67],"that":[68,97,110,127],"emphasize":[69],"data-race-free":[70],"programming.":[71],"We":[72],"analyze":[73],"variety":[75],"of":[76],"implementation":[77],"alternatives":[78],"within":[79],"C++11":[81],"model,":[83],"briefly":[85],"address":[86],"corresponding":[88],"issue":[89],"Java.":[91],"In":[92],"process,":[94],"we":[95],"observe":[96],"there":[98],"may":[99,129],"be":[100,130],"use":[102],"\"read-dont-modify-write\"":[104],"operations,":[105],"i.":[106],"e.":[107],"read-modify-write":[108],"operations":[109],"atomically":[111],"write":[112],"back":[113],"original":[115],"value,":[116],"without":[117],"modifying":[118],"it,":[119],"solely":[120],"model":[124],"consequences,":[125],"it":[128],"useful":[131],"compilers":[133],"optimize":[135],"such":[136],"operations.":[137]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":7},{"year":2020,"cited_by_count":4},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":7},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":2},{"year":2013,"cited_by_count":10},{"year":2012,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
