{"id":"https://openalex.org/W2110512765","doi":"https://doi.org/10.1145/2206781.2206839","title":"An efficient power estimation methodology for complex RISC processor-based platforms","display_name":"An efficient power estimation methodology for complex RISC processor-based platforms","publication_year":2012,"publication_date":"2012-05-03","ids":{"openalex":"https://openalex.org/W2110512765","doi":"https://doi.org/10.1145/2206781.2206839","mag":"2110512765"},"language":"en","primary_location":{"id":"doi:10.1145/2206781.2206839","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2206781.2206839","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the great lakes symposium on VLSI","raw_type":"proceedings-article"},"type":"preprint","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5067713168","display_name":"Santhosh Kumar Rethinagiri","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156171","display_name":"Centre Hospitalier de Valenciennes","ror":"https://ror.org/04taf2z98","country_code":"FR","type":"healthcare","lineage":["https://openalex.org/I4210156171"]},{"id":"https://openalex.org/I70348806","display_name":"Universit\u00e9 Polytechnique Hauts-de-France","ror":"https://ror.org/02ezch769","country_code":"FR","type":"education","lineage":["https://openalex.org/I70348806"]},{"id":"https://openalex.org/I1326498283","display_name":"Institut national de recherche en informatique et en automatique","ror":"https://ror.org/02kvxyf05","country_code":"FR","type":"funder","lineage":["https://openalex.org/I1326498283"]},{"id":"https://openalex.org/I4210089617","display_name":"Laboratoire d'Automatique, de M\u00e9canique et d'Informatique Industrielles et Humaines","ror":"https://ror.org/006z7v557","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210089617","https://openalex.org/I4210159245","https://openalex.org/I4387154098","https://openalex.org/I70348806","https://openalex.org/I70348806"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"Santhosh Kumar Rethinagiri","raw_affiliation_strings":["INRIA-Lille Nord Europe/University of valenciennes, Valenciennes, France","INRIA-Lille Nord Europe/University of valenciennes, Valenciennes, France#TAB#"],"affiliations":[{"raw_affiliation_string":"INRIA-Lille Nord Europe/University of valenciennes, Valenciennes, France","institution_ids":["https://openalex.org/I70348806","https://openalex.org/I4210156171","https://openalex.org/I4210089617"]},{"raw_affiliation_string":"INRIA-Lille Nord Europe/University of valenciennes, Valenciennes, France#TAB#","institution_ids":["https://openalex.org/I1326498283"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073129980","display_name":"Rabie Ben Atitallah","orcid":"https://orcid.org/0000-0001-7690-7344"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Rabie Ben Atitallah","raw_affiliation_strings":["University of Valenciennes, Valenciennes, France"],"affiliations":[{"raw_affiliation_string":"University of Valenciennes, Valenciennes, France","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111522416","display_name":"Jean\u2010Luc Dekeyser","orcid":null},"institutions":[{"id":"https://openalex.org/I2279609970","display_name":"Universit\u00e9 de Lille","ror":"https://ror.org/02kzqn938","country_code":"FR","type":"education","lineage":["https://openalex.org/I2279609970"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Jean-Luc Dekeyser","raw_affiliation_strings":["University of Lille 1, Lille, France","University of Lille-1, Lille, France"],"affiliations":[{"raw_affiliation_string":"University of Lille 1, Lille, France","institution_ids":["https://openalex.org/I2279609970"]},{"raw_affiliation_string":"University of Lille-1, Lille, France","institution_ids":["https://openalex.org/I2279609970"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108377289","display_name":"Eric Senn","orcid":null},"institutions":[{"id":"https://openalex.org/I2802204017","display_name":"Universit\u00e9 de Bretagne Sud","ror":"https://ror.org/04ed7fw48","country_code":"FR","type":"education","lineage":["https://openalex.org/I2802204017"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Eric Senn","raw_affiliation_strings":["University of Bretagne South, Lorient, France"],"affiliations":[{"raw_affiliation_string":"University of Bretagne South, Lorient, France","institution_ids":["https://openalex.org/I2802204017"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5080926469","display_name":"Sma\u00efl Niar","orcid":"https://orcid.org/0000-0002-7550-484X"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Smail Niar","raw_affiliation_strings":["University of Valenciennes, Valenciennes, France"],"affiliations":[{"raw_affiliation_string":"University of Valenciennes, Valenciennes, France","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5067713168"],"corresponding_institution_ids":["https://openalex.org/I4210156171","https://openalex.org/I70348806","https://openalex.org/I1326498283","https://openalex.org/I4210089617"],"apc_list":null,"apc_paid":null,"fwci":1.61447427,"has_fulltext":false,"cited_by_count":13,"citation_normalized_percentile":{"value":0.85058102,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"239","last_page":"244"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/arm9","display_name":"ARM9","score":0.7720191478729248},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.747212290763855},{"id":"https://openalex.org/keywords/reduced-instruction-set-computing","display_name":"Reduced instruction set computing","score":0.6170850396156311},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5527037978172302},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5337238311767578},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.507110595703125},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.48987454175949097},{"id":"https://openalex.org/keywords/processor-design","display_name":"Processor design","score":0.4200068414211273},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3774021863937378},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.36734452843666077},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.24378237128257751}],"concepts":[{"id":"https://openalex.org/C2780992928","wikidata":"https://www.wikidata.org/wiki/Q433285","display_name":"ARM9","level":2,"score":0.7720191478729248},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.747212290763855},{"id":"https://openalex.org/C126298526","wikidata":"https://www.wikidata.org/wiki/Q189376","display_name":"Reduced instruction set computing","level":3,"score":0.6170850396156311},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5527037978172302},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5337238311767578},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.507110595703125},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.48987454175949097},{"id":"https://openalex.org/C526435321","wikidata":"https://www.wikidata.org/wiki/Q1303814","display_name":"Processor design","level":2,"score":0.4200068414211273},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3774021863937378},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.36734452843666077},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.24378237128257751},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2206781.2206839","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2206781.2206839","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the great lakes symposium on VLSI","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.4099999964237213,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W6958365","https://openalex.org/W1510496993","https://openalex.org/W1994718146","https://openalex.org/W2007545650","https://openalex.org/W2028600299","https://openalex.org/W2077331418","https://openalex.org/W2097011865","https://openalex.org/W2102727118","https://openalex.org/W2144293278","https://openalex.org/W2161042344","https://openalex.org/W2340486020","https://openalex.org/W2614231451","https://openalex.org/W2615865818","https://openalex.org/W4251095810"],"related_works":["https://openalex.org/W2993622674","https://openalex.org/W2534569838","https://openalex.org/W182515070","https://openalex.org/W3116750762","https://openalex.org/W4367172762","https://openalex.org/W4364295250","https://openalex.org/W2164026451","https://openalex.org/W2900306051","https://openalex.org/W4310584696","https://openalex.org/W2036206036"],"abstract_inverted_index":{"In":[0,15],"this":[1,16],"contribution,":[2],"we":[3],"propose":[4],"an":[5],"efficient":[6],"power":[7,30,58,71,129,147,172],"estimation":[8,72,148,173],"methodology":[9,89,114],"for":[10,32,137,156,160],"complex":[11],"RISC":[12],"processor-based":[13,163],"platforms.":[14],"methodology,":[17],"the":[18,33,37,52,56,63,101,109,138,170],"Functional":[19],"Level":[20],"Power":[21],"Analysis":[22],"(FLPA)":[23],"is":[24,47,90,115],"used":[25,54],"to":[26,49,68,124,133,169],"set":[27],"up":[28],"generic":[29],"models":[31],"different":[34],"parts":[35,65],"of":[36,62,86,111,121,154],"system.":[38],"Then,":[39],"a":[40,69,75,119],"simulation":[41],"framework":[42],"based":[43],"on":[44],"virtual":[45],"platform":[46],"developed":[48],"evaluate":[50],"accurately":[51],"activities":[53],"in":[55],"related":[57],"models.":[59],"The":[60,82],"combination":[61],"two":[64],"above":[66],"leads":[67],"heterogeneous":[70],"that":[73],"gives":[74],"better":[76],"trade-off":[77],"between":[78],"accuracy":[79,110],"and":[80,84,94,103,108,141,165],"speed.":[81],"usefulness":[83],"effectiveness":[85],"our":[87,112],"proposed":[88,113],"validated":[91],"through":[92],"ARM9":[93],"ARM":[95,142,161],"CortexA8":[96,143,162],"processor":[97],"designed":[98],"respectively":[99],"around":[100],"OMAP5912":[102],"OMAP3530":[104],"boards.":[105],"This":[106],"efficiency":[107],"evaluated":[116],"by":[117],"using":[118],"variety":[120],"basic":[122],"programs":[123],"complete":[125],"media":[126],"benchmarks.":[127],"Estimated":[128],"values":[130],"are":[131],"compared":[132,168],"real":[134],"board":[135],"measurements":[136],"both":[139],"ARM940T":[140,157],"architectures.":[144],"Our":[145],"obtained":[146],"results":[149],"provide":[150],"less":[151],"than":[152],"3%":[153],"error":[155],"processor,":[158],"3.5%":[159],"system":[164],"1x":[166],"faster":[167],"state-of-the-art":[171],"tools.":[174]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":5}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}