{"id":"https://openalex.org/W2138302616","doi":"https://doi.org/10.1145/2206781.2206824","title":"Design-time performance evaluation of thermal management policies for SRAM and RRAM based 3D MPSoCs","display_name":"Design-time performance evaluation of thermal management policies for SRAM and RRAM based 3D MPSoCs","publication_year":2012,"publication_date":"2012-05-03","ids":{"openalex":"https://openalex.org/W2138302616","doi":"https://doi.org/10.1145/2206781.2206824","mag":"2138302616"},"language":"en","primary_location":{"id":"doi:10.1145/2206781.2206824","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2206781.2206824","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the great lakes symposium on VLSI","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5063246387","display_name":"David William Brenner","orcid":null},"institutions":[{"id":"https://openalex.org/I155173764","display_name":"Rochester Institute of Technology","ror":"https://ror.org/00v4yb702","country_code":"US","type":"education","lineage":["https://openalex.org/I155173764"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"David Brenner","raw_affiliation_strings":["Rochester Institute of Technology, Rochester, NY, USA","Rochester Institute of Technology, Rochester , NY, USA"],"affiliations":[{"raw_affiliation_string":"Rochester Institute of Technology, Rochester, NY, USA","institution_ids":["https://openalex.org/I155173764"]},{"raw_affiliation_string":"Rochester Institute of Technology, Rochester , NY, USA","institution_ids":["https://openalex.org/I155173764"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5079020868","display_name":"Cory Merkel","orcid":"https://orcid.org/0000-0003-0252-7829"},"institutions":[{"id":"https://openalex.org/I155173764","display_name":"Rochester Institute of Technology","ror":"https://ror.org/00v4yb702","country_code":"US","type":"education","lineage":["https://openalex.org/I155173764"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Cory Merkel","raw_affiliation_strings":["Rochester Institute of Technology, Rochester, NY, USA","Rochester Institute of Technology, Rochester , NY, USA"],"affiliations":[{"raw_affiliation_string":"Rochester Institute of Technology, Rochester, NY, USA","institution_ids":["https://openalex.org/I155173764"]},{"raw_affiliation_string":"Rochester Institute of Technology, Rochester , NY, USA","institution_ids":["https://openalex.org/I155173764"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5067236813","display_name":"Dhireesha Kudithipudi","orcid":"https://orcid.org/0000-0003-4462-5224"},"institutions":[{"id":"https://openalex.org/I155173764","display_name":"Rochester Institute of Technology","ror":"https://ror.org/00v4yb702","country_code":"US","type":"education","lineage":["https://openalex.org/I155173764"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Dhireesha Kudithipudi","raw_affiliation_strings":["Rochester Institute of Technology, Rochester, NY, USA","Rochester Institute of Technology, Rochester , NY, USA"],"affiliations":[{"raw_affiliation_string":"Rochester Institute of Technology, Rochester, NY, USA","institution_ids":["https://openalex.org/I155173764"]},{"raw_affiliation_string":"Rochester Institute of Technology, Rochester , NY, USA","institution_ids":["https://openalex.org/I155173764"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5063246387"],"corresponding_institution_ids":["https://openalex.org/I155173764"],"apc_list":null,"apc_paid":null,"fwci":0.7365,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.75697803,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"177","last_page":"182"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.804962158203125},{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.754582941532135},{"id":"https://openalex.org/keywords/three-dimensional-integrated-circuit","display_name":"Three-dimensional integrated circuit","score":0.5542631149291992},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.553108811378479},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5299960970878601},{"id":"https://openalex.org/keywords/thermal-management-of-electronic-devices-and-systems","display_name":"Thermal management of electronic devices and systems","score":0.49828052520751953},{"id":"https://openalex.org/keywords/computer-cooling","display_name":"Computer cooling","score":0.48166167736053467},{"id":"https://openalex.org/keywords/performance-improvement","display_name":"Performance improvement","score":0.41014406085014343},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.22309079766273499},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.21414944529533386},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.16946318745613098},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15414771437644958},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.10393831133842468}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.804962158203125},{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.754582941532135},{"id":"https://openalex.org/C59088047","wikidata":"https://www.wikidata.org/wiki/Q229370","display_name":"Three-dimensional integrated circuit","level":3,"score":0.5542631149291992},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.553108811378479},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5299960970878601},{"id":"https://openalex.org/C114834414","wikidata":"https://www.wikidata.org/wiki/Q15477170","display_name":"Thermal management of electronic devices and systems","level":2,"score":0.49828052520751953},{"id":"https://openalex.org/C11026015","wikidata":"https://www.wikidata.org/wiki/Q840551","display_name":"Computer cooling","level":3,"score":0.48166167736053467},{"id":"https://openalex.org/C2778915421","wikidata":"https://www.wikidata.org/wiki/Q3643177","display_name":"Performance improvement","level":2,"score":0.41014406085014343},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.22309079766273499},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.21414944529533386},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.16946318745613098},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15414771437644958},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.10393831133842468},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2206781.2206824","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2206781.2206824","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the great lakes symposium on VLSI","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.5299999713897705,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W1987293146","https://openalex.org/W2000749173","https://openalex.org/W2025331063","https://openalex.org/W2096800126","https://openalex.org/W2097367147","https://openalex.org/W2102255233","https://openalex.org/W2108302928","https://openalex.org/W2115946118","https://openalex.org/W2130517400","https://openalex.org/W2143807959","https://openalex.org/W2144149750","https://openalex.org/W2147657366","https://openalex.org/W2158520123","https://openalex.org/W2158921969","https://openalex.org/W2162770311","https://openalex.org/W2170382128","https://openalex.org/W2170968537","https://openalex.org/W2545500460","https://openalex.org/W2555318774","https://openalex.org/W3142845206","https://openalex.org/W4205241946","https://openalex.org/W4231312101"],"related_works":["https://openalex.org/W2146638334","https://openalex.org/W2786493094","https://openalex.org/W4399621287","https://openalex.org/W3142845206","https://openalex.org/W2063603127","https://openalex.org/W3001671786","https://openalex.org/W2153830988","https://openalex.org/W2396347320","https://openalex.org/W2765638973","https://openalex.org/W2224557336"],"abstract_inverted_index":{"3D-ICs":[0,68],"hold":[1],"significant":[2],"promise":[3],"for":[4,14,70,142,168,192],"future":[5],"generation":[6],"multi":[7],"processor":[8],"systems-on-chip":[9],"due":[10],"to":[11,103,117,177],"their":[12],"potential":[13],"increased":[15],"performance,":[16],"decreased":[17],"power,":[18],"heterogeneous":[19],"integration,":[20],"and":[21,38,50,87,107,133,139,148,165,170,187],"reduced":[22],"cost":[23],"over":[24],"planar":[25],"ICs.":[26],"However,":[27],"the":[28,35,65,71,119,193],"vertical":[29],"integration":[30,72],"of":[31,48,67,73,110,121,185,190],"these":[32],"structures":[33],"exacerbates":[34],"heat":[36],"dissipation":[37],"run-time":[39,51],"thermal":[40,52,108,124],"management":[41,53,125],"issues.":[42],"There":[43],"have":[44],"been":[45],"a":[46,98,181],"number":[47],"design-":[49],"policies":[54,126],"proposed,":[55],"but":[56],"few":[57],"focus":[58],"on":[59,136],"examining":[60],"overall":[61,158],"system":[62,105,137],"performance.":[63],"Additionally,":[64],"heterogeneity":[66],"allows":[69],"novel":[74],"technologies,":[75],"such":[76],"as":[77],"resistive":[78],"random":[79],"access":[80],"memories":[81],"(RRAMs),":[82],"which":[83],"offer":[84],"higher":[85],"density":[86],"lower":[88,157],"power":[89],"than":[90],"traditional":[91],"CMOS":[92],"memory":[93],"technologies.":[94],"Our":[95],"work":[96],"presents":[97],"flexible":[99],"design-time":[100],"simulation":[101],"framework":[102,116],"evaluate":[104],"performance":[106,138,183],"profiles":[109],"3D":[111,144],"MPSoCs.":[112],"We":[113,152],"utilize":[114],"this":[115],"study":[118],"effect":[120],"three":[122],"dynamic":[123],"(air-cooled":[127],"load":[128,131],"balancing,":[129,132],"liquid-cooled":[130],"air-cooled":[134],"DVFS)":[135],"die":[140],"temperature":[141],"multi-tiered":[143],"MPSoCs":[145],"utilizing":[146],"SRAM":[147],"RRAM-based":[149,155],"L2":[150],"caches.":[151],"find":[153],"that":[154],"caches":[156],"average":[159],"maximum":[160],"temperatures":[161],"by":[162],"120":[163],"K":[164,167],"24":[166],"air":[169],"liquid":[171],"cooling":[172],"systems,":[173],"respectively":[174],"(when":[175],"compared":[176],"SRAM-based":[178],"caches),":[179],"at":[180],"worst-case":[182],"delay":[184,189],"47%":[186],"best-case":[188],"13%":[191],"parallel":[194],"shared-memory":[195],"benchmarks":[196],"studied.":[197]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
