{"id":"https://openalex.org/W2024764221","doi":"https://doi.org/10.1145/2206781.2206797","title":"An optimized multicore cache coherence design for exploiting communication locality","display_name":"An optimized multicore cache coherence design for exploiting communication locality","publication_year":2012,"publication_date":"2012-05-03","ids":{"openalex":"https://openalex.org/W2024764221","doi":"https://doi.org/10.1145/2206781.2206797","mag":"2024764221"},"language":"en","primary_location":{"id":"doi:10.1145/2206781.2206797","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2206781.2206797","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the great lakes symposium on VLSI","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5044840341","display_name":"Libo Huang","orcid":"https://orcid.org/0000-0001-7878-3998"},"institutions":[{"id":"https://openalex.org/I170215575","display_name":"National University of Defense Technology","ror":"https://ror.org/05d2yfz11","country_code":"CN","type":"education","lineage":["https://openalex.org/I170215575"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Libo Huang","raw_affiliation_strings":["National University of Defense Technology, Changsha, China","National University of Defense, Technology, ChangSha, China#TAB#"],"affiliations":[{"raw_affiliation_string":"National University of Defense Technology, Changsha, China","institution_ids":["https://openalex.org/I170215575"]},{"raw_affiliation_string":"National University of Defense, Technology, ChangSha, China#TAB#","institution_ids":["https://openalex.org/I170215575"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047295889","display_name":"Zhiying Wang","orcid":"https://orcid.org/0000-0003-3339-3085"},"institutions":[{"id":"https://openalex.org/I170215575","display_name":"National University of Defense Technology","ror":"https://ror.org/05d2yfz11","country_code":"CN","type":"education","lineage":["https://openalex.org/I170215575"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhiying Wang","raw_affiliation_strings":["National University of Defense Technology, Changsha, China","National University of Defense, Technology, ChangSha, China#TAB#"],"affiliations":[{"raw_affiliation_string":"National University of Defense Technology, Changsha, China","institution_ids":["https://openalex.org/I170215575"]},{"raw_affiliation_string":"National University of Defense, Technology, ChangSha, China#TAB#","institution_ids":["https://openalex.org/I170215575"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5023506057","display_name":"Nong Xiao","orcid":"https://orcid.org/0000-0002-2166-977X"},"institutions":[{"id":"https://openalex.org/I170215575","display_name":"National University of Defense Technology","ror":"https://ror.org/05d2yfz11","country_code":"CN","type":"education","lineage":["https://openalex.org/I170215575"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Nong Xiao","raw_affiliation_strings":["National University of Defense Technology, Changsha, China","National University of Defense, Technology, ChangSha, China#TAB#"],"affiliations":[{"raw_affiliation_string":"National University of Defense Technology, Changsha, China","institution_ids":["https://openalex.org/I170215575"]},{"raw_affiliation_string":"National University of Defense, Technology, ChangSha, China#TAB#","institution_ids":["https://openalex.org/I170215575"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5044840341"],"corresponding_institution_ids":["https://openalex.org/I170215575"],"apc_list":null,"apc_paid":null,"fwci":1.4503,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.81178565,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"59","last_page":"62"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/mesi-protocol","display_name":"MESI protocol","score":0.9197854995727539},{"id":"https://openalex.org/keywords/cache-coherence","display_name":"Cache coherence","score":0.9089369177818298},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8641383647918701},{"id":"https://openalex.org/keywords/mesif-protocol","display_name":"MESIF protocol","score":0.7231737375259399},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.6517292261123657},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.6400608420372009},{"id":"https://openalex.org/keywords/cache-invalidation","display_name":"Cache invalidation","score":0.6104351282119751},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.5969309210777283},{"id":"https://openalex.org/keywords/bus-sniffing","display_name":"Bus sniffing","score":0.5543100237846375},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.5538892149925232},{"id":"https://openalex.org/keywords/locality","display_name":"Locality","score":0.5462930798530579},{"id":"https://openalex.org/keywords/directory","display_name":"Directory","score":0.5323178172111511},{"id":"https://openalex.org/keywords/coherence","display_name":"Coherence (philosophical gambling strategy)","score":0.45243600010871887},{"id":"https://openalex.org/keywords/protocol","display_name":"Protocol (science)","score":0.4355957508087158},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.42584747076034546},{"id":"https://openalex.org/keywords/cache-pollution","display_name":"Cache pollution","score":0.41888517141342163},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3921095132827759},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.33390673995018005},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.19273972511291504}],"concepts":[{"id":"https://openalex.org/C120936851","wikidata":"https://www.wikidata.org/wiki/Q1408065","display_name":"MESI protocol","level":5,"score":0.9197854995727539},{"id":"https://openalex.org/C141917322","wikidata":"https://www.wikidata.org/wiki/Q1025017","display_name":"Cache coherence","level":5,"score":0.9089369177818298},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8641383647918701},{"id":"https://openalex.org/C199979278","wikidata":"https://www.wikidata.org/wiki/Q263221","display_name":"MESIF protocol","level":5,"score":0.7231737375259399},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.6517292261123657},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.6400608420372009},{"id":"https://openalex.org/C25536678","wikidata":"https://www.wikidata.org/wiki/Q5015977","display_name":"Cache invalidation","level":5,"score":0.6104351282119751},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.5969309210777283},{"id":"https://openalex.org/C51185590","wikidata":"https://www.wikidata.org/wiki/Q1017228","display_name":"Bus sniffing","level":5,"score":0.5543100237846375},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.5538892149925232},{"id":"https://openalex.org/C2779808786","wikidata":"https://www.wikidata.org/wiki/Q6664603","display_name":"Locality","level":2,"score":0.5462930798530579},{"id":"https://openalex.org/C2777683733","wikidata":"https://www.wikidata.org/wiki/Q201456","display_name":"Directory","level":2,"score":0.5323178172111511},{"id":"https://openalex.org/C2781181686","wikidata":"https://www.wikidata.org/wiki/Q4226068","display_name":"Coherence (philosophical gambling strategy)","level":2,"score":0.45243600010871887},{"id":"https://openalex.org/C2780385302","wikidata":"https://www.wikidata.org/wiki/Q367158","display_name":"Protocol (science)","level":3,"score":0.4355957508087158},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.42584747076034546},{"id":"https://openalex.org/C113166858","wikidata":"https://www.wikidata.org/wiki/Q5015981","display_name":"Cache pollution","level":5,"score":0.41888517141342163},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3921095132827759},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.33390673995018005},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.19273972511291504},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C142724271","wikidata":"https://www.wikidata.org/wiki/Q7208","display_name":"Pathology","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C71924100","wikidata":"https://www.wikidata.org/wiki/Q11190","display_name":"Medicine","level":0,"score":0.0},{"id":"https://openalex.org/C204787440","wikidata":"https://www.wikidata.org/wiki/Q188504","display_name":"Alternative medicine","level":2,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2206781.2206797","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2206781.2206797","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the great lakes symposium on VLSI","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1497011614","https://openalex.org/W1571022506","https://openalex.org/W1594235786","https://openalex.org/W1965491983","https://openalex.org/W2044206819","https://openalex.org/W2095314640","https://openalex.org/W2096193215","https://openalex.org/W2100720297","https://openalex.org/W2136441441","https://openalex.org/W2136466435","https://openalex.org/W2139397536","https://openalex.org/W2139475615","https://openalex.org/W2142002613","https://openalex.org/W2146035237","https://openalex.org/W2146330566","https://openalex.org/W2169387321","https://openalex.org/W4249165316","https://openalex.org/W6680568838"],"related_works":["https://openalex.org/W2290195868","https://openalex.org/W4285204597","https://openalex.org/W1555453305","https://openalex.org/W2584505417","https://openalex.org/W2123859627","https://openalex.org/W2290179447","https://openalex.org/W3037522141","https://openalex.org/W2057019356","https://openalex.org/W4304166325","https://openalex.org/W2371185997"],"abstract_inverted_index":{"Supporting":[0],"cache":[1,18,52,71],"coherence":[2,19,53,102,139],"in":[3,95,128],"current":[4],"multicore":[5,24],"processor":[6],"still":[7],"faces":[8],"scalability":[9],"and":[10,37,58,73,145],"performance":[11,147],"problems.":[12],"This":[13],"paper":[14],"presents":[15],"an":[16],"optimized":[17],"design":[20,50,140],"targeting":[21],"at":[22,56,74],"NoC-based":[23],"processors.":[25],"It":[26,114],"tries":[27],"to":[28],"achieve":[29,142],"the":[30,35,39,43,63,75,79,81,85,122,137],"best":[31],"characteristics":[32],"both":[33],"of":[34,38,45,78],"snooping":[36,66,123],"directory-based":[40],"protocols.":[41],"With":[42],"observation":[44],"network":[46],"traffic":[47],"locality,":[48],"we":[49,104],"a":[51,70,107,129],"that":[54,136],"aims":[55],"local":[57],"remote":[59],"access":[60],"separately.":[61],"At":[62],"first":[64,96],"level,":[65],"is":[67],"achieved":[68],"within":[69],"group":[72],"second":[76],"level":[77,97],"protocol,":[80],"coarse":[82],"directories":[83],"provide":[84],"caches":[86],"with":[87],"information":[88],"about":[89],"which":[90],"processors":[91],"must":[92],"be":[93,126],"involved":[94],"snooping.":[98],"To":[99],"support":[100],"efficient":[101],"broadcasting,":[103],"also":[105],"propose":[106],"low":[108,143],"latency,":[109],"broadcast-enabled":[110],"underlying":[111],"NoC":[112],"design.":[113],"incorporates":[115],"light":[116],"weight":[117],"buses":[118],"into":[119],"NoCs,":[120],"where":[121],"protocol":[124],"can":[125,141],"performed":[127],"broadcast":[130],"fashion.":[131],"Extensive":[132],"experimental":[133],"results":[134],"demonstrate":[135],"proposed":[138],"complexity":[144],"high":[146],"goals.":[148]},"counts_by_year":[{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
