{"id":"https://openalex.org/W2118877599","doi":"https://doi.org/10.1145/2206781.2206788","title":"Efficient CMOL nanoscale hybrid circuit cell assignment using simulated evolution heuristic","display_name":"Efficient CMOL nanoscale hybrid circuit cell assignment using simulated evolution heuristic","publication_year":2012,"publication_date":"2012-05-03","ids":{"openalex":"https://openalex.org/W2118877599","doi":"https://doi.org/10.1145/2206781.2206788","mag":"2118877599"},"language":"en","primary_location":{"id":"doi:10.1145/2206781.2206788","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2206781.2206788","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the great lakes symposium on VLSI","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5017285624","display_name":"Sadiq M. Sait","orcid":"https://orcid.org/0000-0002-4796-0581"},"institutions":[{"id":"https://openalex.org/I134085113","display_name":"King Fahd University of Petroleum and Minerals","ror":"https://ror.org/03yez3163","country_code":"SA","type":"education","lineage":["https://openalex.org/I134085113"]}],"countries":["SA"],"is_corresponding":true,"raw_author_name":"Sadiq M. Sait","raw_affiliation_strings":["King Fahd University of Petroleum and Minerals, Dhahran, Saudi Arabia"],"affiliations":[{"raw_affiliation_string":"King Fahd University of Petroleum and Minerals, Dhahran, Saudi Arabia","institution_ids":["https://openalex.org/I134085113"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5052366617","display_name":"Abdalrahman M. Arafeh","orcid":null},"institutions":[{"id":"https://openalex.org/I134085113","display_name":"King Fahd University of Petroleum and Minerals","ror":"https://ror.org/03yez3163","country_code":"SA","type":"education","lineage":["https://openalex.org/I134085113"]}],"countries":["SA"],"is_corresponding":false,"raw_author_name":"Abdalrahman M. Arafeh","raw_affiliation_strings":["King Fahd University of Petroleum and Minerals, Dhahran, Saudi Arabia"],"affiliations":[{"raw_affiliation_string":"King Fahd University of Petroleum and Minerals, Dhahran, Saudi Arabia","institution_ids":["https://openalex.org/I134085113"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5017285624"],"corresponding_institution_ids":["https://openalex.org/I134085113"],"apc_list":null,"apc_paid":null,"fwci":0.7365,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.75511313,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"21","last_page":"26"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6829344034194946},{"id":"https://openalex.org/keywords/fabrication","display_name":"Fabrication","score":0.6237370371818542},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.615123987197876},{"id":"https://openalex.org/keywords/lithography","display_name":"Lithography","score":0.5453693866729736},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5284550189971924},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.5189573168754578},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.5156087279319763},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4792911410331726},{"id":"https://openalex.org/keywords/crossbar-switch","display_name":"Crossbar switch","score":0.4744490385055542},{"id":"https://openalex.org/keywords/netlist","display_name":"Netlist","score":0.47205525636672974},{"id":"https://openalex.org/keywords/integrated-circuit-layout","display_name":"Integrated circuit layout","score":0.4267587661743164},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.40222403407096863},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.39649802446365356},{"id":"https://openalex.org/keywords/nanotechnology","display_name":"Nanotechnology","score":0.3588382601737976},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.35470065474510193},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.25156867504119873},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.24930104613304138},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.20674839615821838},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1238943338394165}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6829344034194946},{"id":"https://openalex.org/C136525101","wikidata":"https://www.wikidata.org/wiki/Q5428139","display_name":"Fabrication","level":3,"score":0.6237370371818542},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.615123987197876},{"id":"https://openalex.org/C204223013","wikidata":"https://www.wikidata.org/wiki/Q133036","display_name":"Lithography","level":2,"score":0.5453693866729736},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5284550189971924},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.5189573168754578},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.5156087279319763},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4792911410331726},{"id":"https://openalex.org/C29984679","wikidata":"https://www.wikidata.org/wiki/Q1929149","display_name":"Crossbar switch","level":2,"score":0.4744490385055542},{"id":"https://openalex.org/C177650935","wikidata":"https://www.wikidata.org/wiki/Q1760303","display_name":"Netlist","level":2,"score":0.47205525636672974},{"id":"https://openalex.org/C2765594","wikidata":"https://www.wikidata.org/wiki/Q2624187","display_name":"Integrated circuit layout","level":3,"score":0.4267587661743164},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.40222403407096863},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.39649802446365356},{"id":"https://openalex.org/C171250308","wikidata":"https://www.wikidata.org/wiki/Q11468","display_name":"Nanotechnology","level":1,"score":0.3588382601737976},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.35470065474510193},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.25156867504119873},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.24930104613304138},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.20674839615821838},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1238943338394165},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C204787440","wikidata":"https://www.wikidata.org/wiki/Q188504","display_name":"Alternative medicine","level":2,"score":0.0},{"id":"https://openalex.org/C71924100","wikidata":"https://www.wikidata.org/wiki/Q11190","display_name":"Medicine","level":0,"score":0.0},{"id":"https://openalex.org/C142724271","wikidata":"https://www.wikidata.org/wiki/Q7208","display_name":"Pathology","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2206781.2206788","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2206781.2206788","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the great lakes symposium on VLSI","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W198275590","https://openalex.org/W1951775667","https://openalex.org/W2053915113","https://openalex.org/W2088859456","https://openalex.org/W2099665976","https://openalex.org/W2107041387","https://openalex.org/W2123494278","https://openalex.org/W2137249916","https://openalex.org/W2150842433","https://openalex.org/W2152406824","https://openalex.org/W2160388757","https://openalex.org/W2327625289"],"related_works":["https://openalex.org/W2583707817","https://openalex.org/W2115934614","https://openalex.org/W2142651762","https://openalex.org/W2128606704","https://openalex.org/W2148021977","https://openalex.org/W2253173388","https://openalex.org/W2904595763","https://openalex.org/W2131607581","https://openalex.org/W4292182797","https://openalex.org/W2045697850"],"abstract_inverted_index":{"Recently,":[0],"many":[1],"CMOS/nanodevices":[2],"hybrid":[3],"architectures":[4,10],"have":[5],"been":[6],"proposed,":[7],"the":[8,12,59,77],"new":[9],"combine":[11],"flexibility":[13,78],"and":[14,51,83],"high":[15],"fabrication":[16],"yield":[17],"advantages":[18,50],"of":[19,35,43,55,62,79],"CMOS":[20,45],"technology":[21],"with":[22],"nanometer":[23],"scale":[24],"latching":[25],"devices.":[26],"CMOL,":[27],"a":[28],"novel":[29],"architecture":[30],"that":[31,68],"uses":[32],"two":[33],"levels":[34],"perpendicular":[36],"nano-wires":[37],"as":[38],"crossbar":[39],"interconnection":[40],"on":[41],"top":[42],"inverter-based":[44],"stack,":[46],"offers":[47],"significant":[48],"density":[49],"overcomes":[52],"physical":[53],"barriers":[54],"lithography-based":[56],"fabrication.":[57],"However,":[58],"confined":[60],"connectivity":[61,74],"CMOL":[63],"nanofabric":[64],"to":[65],"only":[66],"cells":[67,86],"are":[69],"located":[70],"within":[71],"proximity":[72],"square-like":[73],"domain,":[75],"reduces":[76],"VLSI":[80],"design":[81],"automation":[82],"further":[84],"complicates":[85],"placement.":[87]},"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2015,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
