{"id":"https://openalex.org/W2060219020","doi":"https://doi.org/10.1145/2148600.2148639","title":"Poster","display_name":"Poster","publication_year":2011,"publication_date":"2011-11-12","ids":{"openalex":"https://openalex.org/W2060219020","doi":"https://doi.org/10.1145/2148600.2148639","mag":"2060219020"},"language":"en","primary_location":{"id":"doi:10.1145/2148600.2148639","is_oa":true,"landing_page_url":"https://doi.org/10.1145/2148600.2148639","pdf_url":"https://dl.acm.org/action/downloadSupplement?doi=10.1145%2F2148600.2148639&file=post225.pdf","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2011 companion on High Performance Computing Networking, Storage and Analysis Companion","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://dl.acm.org/action/downloadSupplement?doi=10.1145%2F2148600.2148639&file=post225.pdf","any_repository_has_fulltext":null},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102100502","display_name":"Kenneth S. Lee","orcid":null},"institutions":[{"id":"https://openalex.org/I859038795","display_name":"Virginia Tech","ror":"https://ror.org/02smfhw86","country_code":"US","type":"education","lineage":["https://openalex.org/I859038795"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Kenneth S. Lee","raw_affiliation_strings":["Virginia Tech, Blacksburg, VA, USA","Virginia Tech, , Blacksburg, VA, USA"],"affiliations":[{"raw_affiliation_string":"Virginia Tech, Blacksburg, VA, USA","institution_ids":["https://openalex.org/I859038795"]},{"raw_affiliation_string":"Virginia Tech, , Blacksburg, VA, USA","institution_ids":["https://openalex.org/I859038795"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066494596","display_name":"Heshan Lin","orcid":"https://orcid.org/0000-0001-9286-9421"},"institutions":[{"id":"https://openalex.org/I859038795","display_name":"Virginia Tech","ror":"https://ror.org/02smfhw86","country_code":"US","type":"education","lineage":["https://openalex.org/I859038795"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Heshan Lin","raw_affiliation_strings":["Virginia Tech, Blacksburg, VA, USA","Virginia Tech, , Blacksburg, VA, USA"],"affiliations":[{"raw_affiliation_string":"Virginia Tech, Blacksburg, VA, USA","institution_ids":["https://openalex.org/I859038795"]},{"raw_affiliation_string":"Virginia Tech, , Blacksburg, VA, USA","institution_ids":["https://openalex.org/I859038795"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5058539554","display_name":"Wu-chun Feng","orcid":"https://orcid.org/0000-0002-6015-0727"},"institutions":[{"id":"https://openalex.org/I859038795","display_name":"Virginia Tech","ror":"https://ror.org/02smfhw86","country_code":"US","type":"education","lineage":["https://openalex.org/I859038795"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Wu-chun Feng","raw_affiliation_strings":["Virginia Tech, Blacksburg, VA, USA","Virginia Tech, , Blacksburg, VA, USA"],"affiliations":[{"raw_affiliation_string":"Virginia Tech, Blacksburg, VA, USA","institution_ids":["https://openalex.org/I859038795"]},{"raw_affiliation_string":"Virginia Tech, , Blacksburg, VA, USA","institution_ids":["https://openalex.org/I859038795"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5102100502"],"corresponding_institution_ids":["https://openalex.org/I859038795"],"apc_list":null,"apc_paid":null,"fwci":0.7556,"has_fulltext":true,"cited_by_count":3,"citation_normalized_percentile":{"value":0.72759378,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"75","last_page":"76"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8323197364807129},{"id":"https://openalex.org/keywords/kernel","display_name":"Kernel (algebra)","score":0.6229506731033325},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5623133182525635},{"id":"https://openalex.org/keywords/address-space","display_name":"Address space","score":0.49563705921173096},{"id":"https://openalex.org/keywords/memory-controller","display_name":"Memory controller","score":0.47859975695610046},{"id":"https://openalex.org/keywords/central-processing-unit","display_name":"Central processing unit","score":0.4663827419281006},{"id":"https://openalex.org/keywords/physical-address","display_name":"Physical address","score":0.4549301862716675},{"id":"https://openalex.org/keywords/uniform-memory-access","display_name":"Uniform memory access","score":0.45020240545272827},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.43902474641799927},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3569202423095703},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.33315926790237427},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.3240346312522888},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3205871880054474},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.19941255450248718}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8323197364807129},{"id":"https://openalex.org/C74193536","wikidata":"https://www.wikidata.org/wiki/Q574844","display_name":"Kernel (algebra)","level":2,"score":0.6229506731033325},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5623133182525635},{"id":"https://openalex.org/C144240696","wikidata":"https://www.wikidata.org/wiki/Q367204","display_name":"Address space","level":2,"score":0.49563705921173096},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.47859975695610046},{"id":"https://openalex.org/C49154492","wikidata":"https://www.wikidata.org/wiki/Q5300","display_name":"Central processing unit","level":2,"score":0.4663827419281006},{"id":"https://openalex.org/C41036726","wikidata":"https://www.wikidata.org/wiki/Q844824","display_name":"Physical address","level":3,"score":0.4549301862716675},{"id":"https://openalex.org/C51290061","wikidata":"https://www.wikidata.org/wiki/Q1936765","display_name":"Uniform memory access","level":4,"score":0.45020240545272827},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.43902474641799927},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3569202423095703},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.33315926790237427},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.3240346312522888},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3205871880054474},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.19941255450248718},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2148600.2148639","is_oa":true,"landing_page_url":"https://doi.org/10.1145/2148600.2148639","pdf_url":"https://dl.acm.org/action/downloadSupplement?doi=10.1145%2F2148600.2148639&file=post225.pdf","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2011 companion on High Performance Computing Networking, Storage and Analysis Companion","raw_type":"proceedings-article"}],"best_oa_location":{"id":"doi:10.1145/2148600.2148639","is_oa":true,"landing_page_url":"https://doi.org/10.1145/2148600.2148639","pdf_url":"https://dl.acm.org/action/downloadSupplement?doi=10.1145%2F2148600.2148639&file=post225.pdf","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2011 companion on High Performance Computing Networking, Storage and Analysis Companion","raw_type":"proceedings-article"},"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.7200000286102295}],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2060219020.pdf","grobid_xml":"https://content.openalex.org/works/W2060219020.grobid-xml"},"referenced_works_count":1,"referenced_works":["https://openalex.org/W2165039583"],"related_works":["https://openalex.org/W1569262345","https://openalex.org/W2057195881","https://openalex.org/W2149371164","https://openalex.org/W2148966412","https://openalex.org/W2782503170","https://openalex.org/W192975273","https://openalex.org/W2041174925","https://openalex.org/W2047684617","https://openalex.org/W4287022403","https://openalex.org/W3195432646"],"abstract_inverted_index":{"The":[0,122],"cost":[1],"of":[2,94,107,134],"data":[3],"transfers":[4],"over":[5],"PCI-Express":[6],"often":[7],"limits":[8],"application":[9],"performance":[10,105,137],"on":[11,64,72,111,114],"traditional":[12],"discrete":[13,65,132],"GPUs.":[14],"To":[15],"address":[16],"this,":[17],"AMD":[18,116,127],"Fusion":[19,117,128],"introduces":[20],"a":[21,31,39,46,69,79,131,145],"novel":[22],"architecture":[23,44,98],"that":[24,60,126],"fuses":[25],"the":[26,36,73,92,95,104,135],"CPU":[27,51],"and":[28,34,52,83],"GPU":[29,74,133],"onto":[30],"single":[32],"die":[33],"connects":[35],"two":[37],"with":[38],"high-performance":[40],"memory":[41,48,57,81],"controller.":[42],"This":[43],"features":[45],"shared":[47],"space":[49],"between":[50],"GPU,":[53],"enabling":[54],"several":[55],"new":[56],"access":[58,78],"techniques":[59,110],"are":[61],"not":[62],"available":[63],"architectures.":[66],"For":[67],"instance,":[68],"kernel":[70],"running":[71,113],"can":[75,129],"now":[76],"directly":[77],"host":[80],"buffer":[82],"vice":[84],"versa.":[85],"As":[86],"an":[87,115],"initial":[88],"step":[89],"towards":[90],"understanding":[91],"implications":[93],"fused":[96],"CPU+GPU":[97],"to":[99],"heterogeneous":[100],"computing,":[101],"we":[102],"characterize":[103],"impact":[106],"various":[108],"memory-access":[109],"applications":[112],"platform":[118],"(i.e.,":[119],"Llano":[120],"A8-3850).":[121],"experimental":[123],"results":[124],"show":[125],"outperform":[130],"same":[136],"class":[138],"by":[139],"as":[140,142],"much":[141],"4-fold":[143],"for":[144],"memory-bound":[146],"kernel.":[147]},"counts_by_year":[{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2016-06-24T00:00:00"}
