{"id":"https://openalex.org/W2086544838","doi":"https://doi.org/10.1145/2145694.2145743","title":"A field programmable array core for image processing (abstract only)","display_name":"A field programmable array core for image processing (abstract only)","publication_year":2012,"publication_date":"2012-02-22","ids":{"openalex":"https://openalex.org/W2086544838","doi":"https://doi.org/10.1145/2145694.2145743","mag":"2086544838"},"language":"en","primary_location":{"id":"doi:10.1145/2145694.2145743","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2145694.2145743","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5000311462","display_name":"Declan Walsh","orcid":null},"institutions":[{"id":"https://openalex.org/I28407311","display_name":"University of Manchester","ror":"https://ror.org/027m9bs27","country_code":"GB","type":"education","lineage":["https://openalex.org/I28407311"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"Declan Walsh","raw_affiliation_strings":["The University of Manchester, Manchester, United Kingdom"],"affiliations":[{"raw_affiliation_string":"The University of Manchester, Manchester, United Kingdom","institution_ids":["https://openalex.org/I28407311"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5057658631","display_name":"Piotr Dudek","orcid":"https://orcid.org/0000-0002-6511-6165"},"institutions":[{"id":"https://openalex.org/I28407311","display_name":"University of Manchester","ror":"https://ror.org/027m9bs27","country_code":"GB","type":"education","lineage":["https://openalex.org/I28407311"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Piotr Dudek","raw_affiliation_strings":["The University of Manchester, Manchester, United Kingdom"],"affiliations":[{"raw_affiliation_string":"The University of Manchester, Manchester, United Kingdom","institution_ids":["https://openalex.org/I28407311"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5000311462"],"corresponding_institution_ids":["https://openalex.org/I28407311"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.13974232,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"266","last_page":"266"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10531","display_name":"Advanced Vision and Imaging","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10627","display_name":"Advanced Image and Video Retrieval Techniques","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8288403749465942},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7902878522872925},{"id":"https://openalex.org/keywords/grayscale","display_name":"Grayscale","score":0.6581794023513794},{"id":"https://openalex.org/keywords/upload","display_name":"Upload","score":0.5843327641487122},{"id":"https://openalex.org/keywords/processor-array","display_name":"Processor array","score":0.5685397982597351},{"id":"https://openalex.org/keywords/simd","display_name":"SIMD","score":0.5355271100997925},{"id":"https://openalex.org/keywords/image-processing","display_name":"Image processing","score":0.5268662571907043},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5093790292739868},{"id":"https://openalex.org/keywords/sobel-operator","display_name":"Sobel operator","score":0.49018698930740356},{"id":"https://openalex.org/keywords/enhanced-data-rates-for-gsm-evolution","display_name":"Enhanced Data Rates for GSM Evolution","score":0.471282422542572},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.4424346387386322},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3783368468284607},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.33506202697753906},{"id":"https://openalex.org/keywords/edge-detection","display_name":"Edge detection","score":0.30997592210769653},{"id":"https://openalex.org/keywords/image","display_name":"Image (mathematics)","score":0.27199962735176086},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.19802874326705933}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8288403749465942},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7902878522872925},{"id":"https://openalex.org/C78201319","wikidata":"https://www.wikidata.org/wiki/Q685727","display_name":"Grayscale","level":3,"score":0.6581794023513794},{"id":"https://openalex.org/C71901391","wikidata":"https://www.wikidata.org/wiki/Q7126699","display_name":"Upload","level":2,"score":0.5843327641487122},{"id":"https://openalex.org/C2776189500","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Processor array","level":2,"score":0.5685397982597351},{"id":"https://openalex.org/C150552126","wikidata":"https://www.wikidata.org/wiki/Q339387","display_name":"SIMD","level":2,"score":0.5355271100997925},{"id":"https://openalex.org/C9417928","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Image processing","level":3,"score":0.5268662571907043},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5093790292739868},{"id":"https://openalex.org/C30703548","wikidata":"https://www.wikidata.org/wiki/Q1757673","display_name":"Sobel operator","level":5,"score":0.49018698930740356},{"id":"https://openalex.org/C162307627","wikidata":"https://www.wikidata.org/wiki/Q204833","display_name":"Enhanced Data Rates for GSM Evolution","level":2,"score":0.471282422542572},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.4424346387386322},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3783368468284607},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.33506202697753906},{"id":"https://openalex.org/C193536780","wikidata":"https://www.wikidata.org/wiki/Q1513153","display_name":"Edge detection","level":4,"score":0.30997592210769653},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.27199962735176086},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.19802874326705933},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1145/2145694.2145743","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2145694.2145743","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays","raw_type":"proceedings-article"},{"id":"pmh:oai:pure.atira.dk:openaire_cris_publications/49581b3e-a542-4bce-acfb-9ec76d70e42f","is_oa":false,"landing_page_url":"https://research.manchester.ac.uk/en/publications/49581b3e-a542-4bce-acfb-9ec76d70e42f","pdf_url":null,"source":{"id":"https://openalex.org/S4306400662","display_name":"Research Explorer (The University of Manchester)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I28407311","host_organization_name":"University of Manchester","host_organization_lineage":["https://openalex.org/I28407311"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Walsh, D & Dudek, P 2012, A field programmable array core for image processing. in Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA'12. Association for Computing Machinery, pp. 266-266, Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays, 1/01/24. https://doi.org/10.1145/2145694.2145743","raw_type":"info:eu-repo/semantics/conferenceObject"},{"id":"pmh:oai:pure.atira.dk:publications/49581b3e-a542-4bce-acfb-9ec76d70e42f","is_oa":false,"landing_page_url":"https://www.research.manchester.ac.uk/portal/en/publications/a-field-programmable-array-core-for-image-processing(49581b3e-a542-4bce-acfb-9ec76d70e42f).html","pdf_url":null,"source":{"id":"https://openalex.org/S4306400662","display_name":"Research Explorer (The University of Manchester)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I28407311","host_organization_name":"University of Manchester","host_organization_lineage":["https://openalex.org/I28407311"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Walsh, D & Dudek, P 2012, A field programmable array core for image processing. in Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA'12. Association for Computing Machinery, pp. 266-266, Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays, 1/01/24. https://doi.org/10.1145/2145694.2145743","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.49000000953674316,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W1978692160","https://openalex.org/W2097262165","https://openalex.org/W2127103393","https://openalex.org/W2154014642","https://openalex.org/W2165310216","https://openalex.org/W2171843744","https://openalex.org/W2186949671","https://openalex.org/W3157778366"],"related_works":["https://openalex.org/W3049266045","https://openalex.org/W4388400392","https://openalex.org/W2383455043","https://openalex.org/W2343079405","https://openalex.org/W4388467415","https://openalex.org/W2269083758","https://openalex.org/W1974517722","https://openalex.org/W2367735169","https://openalex.org/W2545393398","https://openalex.org/W4225576506"],"abstract_inverted_index":{"Massively":[0],"parallel":[1],"processor":[2,28,70,85,110,170],"arrays":[3,29,71,94],"have":[4,30,72],"been":[5,31,73],"shown":[6],"to":[7,82,136,162,260],"be":[8,269],"an":[9,105,138,215,223,235],"effective":[10],"and":[11,179,203,233],"suitable":[12],"choice":[13],"for":[14,33,127],"image":[15,207,226,238],"processing":[16,47,114,128],"tasks":[17,37],"[1].":[18],"More":[19],"recently,":[20],"some":[21],"of":[22,25,64,88,91,95,108,176,183,222,262],"the":[23,26,113,156,160,254,256,263],"state":[24,261],"art":[27,264],"used":[32],"real-time":[34],"machine":[35],"vision":[36],"such":[38,84],"as":[39,118,120],"intelligent":[40],"transport":[41],"system":[42],"applications":[43,50],"[2]":[44],"or":[45],"video":[46],"on":[48,75,148,271],"mobile":[49],"[3]":[51],"providing":[52,123],"a":[53,59,109,149,166,174,181,205,209,240],"much":[54],"more":[55],"powerful":[56],"solution":[57],"than":[58],"conventional":[60],"processor.":[61],"A":[62,140,192],"number":[63],"Single":[65],"Instruction":[66],"Multiple":[67],"Data":[68],"(SIMD)":[69],"implemented":[74,147,270],"FPGAs":[76,250],"[4]-[6],":[77],"which":[78],"are":[79,117],"particularly":[80],"suited":[81],"implementing":[83],"architectures":[86],"because":[87],"their":[89],"similarities":[90],"both":[92],"being":[93,251],"fine":[96],"grained":[97],"logic":[98],"elements.":[99],"In":[100],"this":[101],"work,":[102],"we":[103],"propose":[104],"FPGA":[106,154],"implementation":[107],"array":[111,145,171,213,244,257],"where":[112],"elements":[115],"(PEs)":[116],"small":[119],"possible,":[121],"while":[122],"local":[124],"memory":[125],"sufficient":[126],"greyscale":[129,225,237],"images.":[130],"The":[131,169],"PE":[132,144],"is":[133,146,197,227],"then":[134],"replicated":[135],"form":[137],"array.":[139],"32":[141,143,210,212,241,243],"\u00d7":[142,211,242],"Xilinx":[150],"Virtex":[151],"5":[152],"XC5VLX50":[153],"using":[155,165],"four-neighbour":[157],"connectivity":[158],"with":[159],"possibility":[161],"scale":[163],"up":[164],"larger":[167,249],"FPGA.":[168],"operates":[172],"at":[173],"frequency":[175],"96":[177],"MHz":[178],"executes":[180],"peak":[182],"98.3":[184],"giga":[185],"operations":[186],"per":[187],"second":[188],"(GOPS)":[189],"(bit-serial":[190],"operations).":[191],"binary":[193,206],"edge":[194,220],"detection":[195,221],"algorithm":[196],"performed":[198,228],"in":[199,208,229,239,253],"52.08":[200],"ns.":[201,218],"Uploading":[202,232],"downloading":[204,234],"takes":[214,245],"extra":[216],"687.5":[217],"Sobel":[219],"8-bit":[224,236],"5.33":[230],"\u00b5s.":[231,247],"5.36":[246],"With":[248],"available":[252],"future,":[255],"sizes":[258],"comparable":[259],"custom":[265],"designed":[266],"ICs":[267],"can":[268],"these":[272],"FPGAs.":[273]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
