{"id":"https://openalex.org/W2102800454","doi":"https://doi.org/10.1145/2039370.2039388","title":"PRET DRAM controller","display_name":"PRET DRAM controller","publication_year":2011,"publication_date":"2011-10-09","ids":{"openalex":"https://openalex.org/W2102800454","doi":"https://doi.org/10.1145/2039370.2039388","mag":"2102800454"},"language":"en","primary_location":{"id":"doi:10.1145/2039370.2039388","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2039370.2039388","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5056396265","display_name":"Jan Reineke","orcid":"https://orcid.org/0000-0002-3459-2214"},"institutions":[{"id":"https://openalex.org/I95457486","display_name":"University of California, Berkeley","ror":"https://ror.org/01an7q238","country_code":"US","type":"education","lineage":["https://openalex.org/I95457486"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Jan Reineke","raw_affiliation_strings":["University of California at Berkeley, Berkeley, CA, USA"],"affiliations":[{"raw_affiliation_string":"University of California at Berkeley, Berkeley, CA, USA","institution_ids":["https://openalex.org/I95457486"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078613469","display_name":"Isaac Liu","orcid":null},"institutions":[{"id":"https://openalex.org/I95457486","display_name":"University of California, Berkeley","ror":"https://ror.org/01an7q238","country_code":"US","type":"education","lineage":["https://openalex.org/I95457486"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Isaac Liu","raw_affiliation_strings":["University of California at Berkeley, Berkeley, CA, USA"],"affiliations":[{"raw_affiliation_string":"University of California at Berkeley, Berkeley, CA, USA","institution_ids":["https://openalex.org/I95457486"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074065388","display_name":"Hiren Patel","orcid":"https://orcid.org/0000-0003-2750-4471"},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Hiren D. Patel","raw_affiliation_strings":["University of Waterloo, Waterloo, ON, Canada","University of Waterloo, Waterloo, Ontario, CANADA"],"affiliations":[{"raw_affiliation_string":"University of Waterloo, Waterloo, ON, Canada","institution_ids":["https://openalex.org/I151746483"]},{"raw_affiliation_string":"University of Waterloo, Waterloo, Ontario, CANADA","institution_ids":["https://openalex.org/I151746483"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083165659","display_name":"Sung Jun Kim","orcid":"https://orcid.org/0000-0002-7876-7901"},"institutions":[{"id":"https://openalex.org/I78577930","display_name":"Columbia University","ror":"https://ror.org/00hj8s172","country_code":"US","type":"education","lineage":["https://openalex.org/I78577930"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sungjun Kim","raw_affiliation_strings":["Columbia University, New York, NY, USA"],"affiliations":[{"raw_affiliation_string":"Columbia University, New York, NY, USA","institution_ids":["https://openalex.org/I78577930"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5009831760","display_name":"Edward A. Lee","orcid":"https://orcid.org/0000-0002-5663-0584"},"institutions":[{"id":"https://openalex.org/I95457486","display_name":"University of California, Berkeley","ror":"https://ror.org/01an7q238","country_code":"US","type":"education","lineage":["https://openalex.org/I95457486"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Edward A. Lee","raw_affiliation_strings":["University of California at Berkeley, Berkeley, CA, USA"],"affiliations":[{"raw_affiliation_string":"University of California at Berkeley, Berkeley, CA, USA","institution_ids":["https://openalex.org/I95457486"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5056396265"],"corresponding_institution_ids":["https://openalex.org/I95457486"],"apc_list":null,"apc_paid":null,"fwci":15.4063,"has_fulltext":false,"cited_by_count":170,"citation_normalized_percentile":{"value":0.99309519,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":91,"max":100},"biblio":{"volume":null,"issue":null,"first_page":"99","last_page":"108"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/memory-controller","display_name":"Memory controller","score":0.8779234290122986},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.855452299118042},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8034698963165283},{"id":"https://openalex.org/keywords/cas-latency","display_name":"CAS latency","score":0.6905170679092407},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.6474856734275818},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.637847363948822},{"id":"https://openalex.org/keywords/dynamic-random-access-memory","display_name":"Dynamic random-access memory","score":0.5308493375778198},{"id":"https://openalex.org/keywords/controller","display_name":"Controller (irrigation)","score":0.46219000220298767},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3813467025756836},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2914060354232788},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.23232543468475342},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.2001344859600067}],"concepts":[{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.8779234290122986},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.855452299118042},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8034698963165283},{"id":"https://openalex.org/C189930140","wikidata":"https://www.wikidata.org/wiki/Q1112878","display_name":"CAS latency","level":4,"score":0.6905170679092407},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.6474856734275818},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.637847363948822},{"id":"https://openalex.org/C118702147","wikidata":"https://www.wikidata.org/wiki/Q189396","display_name":"Dynamic random-access memory","level":3,"score":0.5308493375778198},{"id":"https://openalex.org/C203479927","wikidata":"https://www.wikidata.org/wiki/Q5165939","display_name":"Controller (irrigation)","level":2,"score":0.46219000220298767},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3813467025756836},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2914060354232788},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.23232543468475342},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.2001344859600067},{"id":"https://openalex.org/C6557445","wikidata":"https://www.wikidata.org/wiki/Q173113","display_name":"Agronomy","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2039370.2039388","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2039370.2039388","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6100000143051147,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W116663868","https://openalex.org/W1515422725","https://openalex.org/W1554331127","https://openalex.org/W1965676608","https://openalex.org/W1976014094","https://openalex.org/W2066744234","https://openalex.org/W2069195425","https://openalex.org/W2085481531","https://openalex.org/W2108024087","https://openalex.org/W2116826559","https://openalex.org/W2122833539","https://openalex.org/W2146486934","https://openalex.org/W2151653149","https://openalex.org/W2156588404","https://openalex.org/W2162639668","https://openalex.org/W2165683591","https://openalex.org/W2540025645","https://openalex.org/W3140995555"],"related_works":["https://openalex.org/W1976244802","https://openalex.org/W4293430534","https://openalex.org/W2335743642","https://openalex.org/W4297812927","https://openalex.org/W4386903460","https://openalex.org/W2800412005","https://openalex.org/W2122646225","https://openalex.org/W2536264121","https://openalex.org/W2912837441","https://openalex.org/W2080488045"],"abstract_inverted_index":{"Hard":[0],"real-time":[1,56],"embedded":[2,57],"systems":[3],"employ":[4],"high-capacity":[5],"memories":[6],"such":[7],"as":[8],"Dynamic":[9],"RAMs":[10],"(DRAMs)":[11],"to":[12],"cope":[13],"with":[14],"increasing":[15],"data":[16],"and":[17],"code":[18],"sizes":[19],"of":[20,41],"modern":[21],"designs.":[22],"However,":[23],"memory":[24,42],"controller":[25],"design":[26],"has":[27],"so":[28],"far":[29],"largely":[30],"focused":[31],"on":[32],"improving":[33],"average-case":[34],"performance.":[35],"As":[36],"a":[37],"consequence,":[38],"the":[39,48],"latency":[40],"accesses":[43],"is":[44],"unpredictable,":[45],"which":[46],"complicates":[47],"worst-case":[49],"execution":[50],"time":[51],"analysis":[52],"necessary":[53],"for":[54],"hard":[55],"systems.":[58]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":8},{"year":2020,"cited_by_count":6},{"year":2019,"cited_by_count":14},{"year":2018,"cited_by_count":13},{"year":2017,"cited_by_count":10},{"year":2016,"cited_by_count":24},{"year":2015,"cited_by_count":29},{"year":2014,"cited_by_count":25},{"year":2013,"cited_by_count":20},{"year":2012,"cited_by_count":14}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}
