{"id":"https://openalex.org/W2058987080","doi":"https://doi.org/10.1145/2020876.2020888","title":"Optimized sizing of analog circuits using the interior-point method for nonconvex nonlinear functions under MATLAB","display_name":"Optimized sizing of analog circuits using the interior-point method for nonconvex nonlinear functions under MATLAB","publication_year":2011,"publication_date":"2011-08-30","ids":{"openalex":"https://openalex.org/W2058987080","doi":"https://doi.org/10.1145/2020876.2020888","mag":"2058987080"},"language":"en","primary_location":{"id":"doi:10.1145/2020876.2020888","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2020876.2020888","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 24th symposium on Integrated circuits and systems design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5037751819","display_name":"Ricardo Almeida Ara\u00fajo da Silva","orcid":null},"institutions":[{"id":"https://openalex.org/I126158947","display_name":"Universidade Federal da Bahia","ror":"https://ror.org/03k3p7647","country_code":"BR","type":"education","lineage":["https://openalex.org/I126158947"]}],"countries":["BR"],"is_corresponding":true,"raw_author_name":"Ricardo Almeida Ara\u00fajo da Silva","raw_affiliation_strings":["Universidade Federal da Bahia, Salvador, Brazil"],"affiliations":[{"raw_affiliation_string":"Universidade Federal da Bahia, Salvador, Brazil","institution_ids":["https://openalex.org/I126158947"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011600149","display_name":"Ana Isabela Ara\u00fajo Cunha","orcid":"https://orcid.org/0000-0003-3955-3430"},"institutions":[{"id":"https://openalex.org/I126158947","display_name":"Universidade Federal da Bahia","ror":"https://ror.org/03k3p7647","country_code":"BR","type":"education","lineage":["https://openalex.org/I126158947"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Ana Isabela Ara\u00fajo Cunha","raw_affiliation_strings":["Universidade Federal da Bahia, Salvador, Brazil"],"affiliations":[{"raw_affiliation_string":"Universidade Federal da Bahia, Salvador, Brazil","institution_ids":["https://openalex.org/I126158947"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5072062238","display_name":"Luciana Martinez","orcid":"https://orcid.org/0000-0003-2806-2783"},"institutions":[{"id":"https://openalex.org/I126158947","display_name":"Universidade Federal da Bahia","ror":"https://ror.org/03k3p7647","country_code":"BR","type":"education","lineage":["https://openalex.org/I126158947"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Luciana Martinez","raw_affiliation_strings":["Universidade Federal da Bahia, Salvador, Brazil"],"affiliations":[{"raw_affiliation_string":"Universidade Federal da Bahia, Salvador, Brazil","institution_ids":["https://openalex.org/I126158947"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5037751819"],"corresponding_institution_ids":["https://openalex.org/I126158947"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.11084625,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"45","last_page":"50"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/matlab","display_name":"MATLAB","score":0.6724703311920166},{"id":"https://openalex.org/keywords/integrator","display_name":"Integrator","score":0.6521669626235962},{"id":"https://openalex.org/keywords/nonlinear-system","display_name":"Nonlinear system","score":0.5531682372093201},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5412364602088928},{"id":"https://openalex.org/keywords/interior-point-method","display_name":"Interior point method","score":0.5264440774917603},{"id":"https://openalex.org/keywords/sizing","display_name":"Sizing","score":0.5115519165992737},{"id":"https://openalex.org/keywords/biasing","display_name":"Biasing","score":0.5107171535491943},{"id":"https://openalex.org/keywords/spice","display_name":"Spice","score":0.5003564357757568},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4853155016899109},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4577341377735138},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.4377007484436035},{"id":"https://openalex.org/keywords/analogue-electronics","display_name":"Analogue electronics","score":0.4371950030326843},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.41479721665382385},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.389545202255249},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.24284228682518005},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2089088261127472},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1813809871673584},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.07223847508430481}],"concepts":[{"id":"https://openalex.org/C2780365114","wikidata":"https://www.wikidata.org/wiki/Q169478","display_name":"MATLAB","level":2,"score":0.6724703311920166},{"id":"https://openalex.org/C79518650","wikidata":"https://www.wikidata.org/wiki/Q2081431","display_name":"Integrator","level":3,"score":0.6521669626235962},{"id":"https://openalex.org/C158622935","wikidata":"https://www.wikidata.org/wiki/Q660848","display_name":"Nonlinear system","level":2,"score":0.5531682372093201},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5412364602088928},{"id":"https://openalex.org/C155253501","wikidata":"https://www.wikidata.org/wiki/Q461992","display_name":"Interior point method","level":2,"score":0.5264440774917603},{"id":"https://openalex.org/C2777767291","wikidata":"https://www.wikidata.org/wiki/Q1080291","display_name":"Sizing","level":2,"score":0.5115519165992737},{"id":"https://openalex.org/C20254490","wikidata":"https://www.wikidata.org/wiki/Q719550","display_name":"Biasing","level":3,"score":0.5107171535491943},{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.5003564357757568},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4853155016899109},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4577341377735138},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.4377007484436035},{"id":"https://openalex.org/C29074008","wikidata":"https://www.wikidata.org/wiki/Q174925","display_name":"Analogue electronics","level":3,"score":0.4371950030326843},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.41479721665382385},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.389545202255249},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.24284228682518005},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2089088261127472},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1813809871673584},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.07223847508430481},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2020876.2020888","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2020876.2020888","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 24th symposium on Integrated circuits and systems design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.4699999988079071}],"awards":[],"funders":[{"id":"https://openalex.org/F4320321091","display_name":"Coordena\u00e7\u00e3o de Aperfei\u00e7oamento de Pessoal de N\u00edvel Superior","ror":"https://ror.org/00x0ma614"},{"id":"https://openalex.org/F4320322025","display_name":"Conselho Nacional de Desenvolvimento Cient\u00edfico e Tecnol\u00f3gico","ror":"https://ror.org/03swz6y49"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1598054008","https://openalex.org/W2009219733","https://openalex.org/W2030723843","https://openalex.org/W2031927848","https://openalex.org/W2104930768","https://openalex.org/W2106476087","https://openalex.org/W2122919983","https://openalex.org/W2125819445","https://openalex.org/W2141877274","https://openalex.org/W2171558685","https://openalex.org/W2600578627","https://openalex.org/W2611147814","https://openalex.org/W3029645440","https://openalex.org/W3149782279","https://openalex.org/W3216584063"],"related_works":["https://openalex.org/W2204879205","https://openalex.org/W2096437374","https://openalex.org/W1943174035","https://openalex.org/W1928481607","https://openalex.org/W3135165657","https://openalex.org/W1485582195","https://openalex.org/W57337972","https://openalex.org/W2313216219","https://openalex.org/W1561306903","https://openalex.org/W1844317615"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"an":[3],"application":[4],"of":[5,9,14],"the":[6,12,23,64],"Interior-Point":[7],"method":[8],"optimization":[10,59,66],"to":[11,46,70],"design":[13],"a":[15],"CMOS":[16],"analog":[17],"integrated":[18],"circuit.":[19],"We":[20],"have":[21],"chosen":[22],"minimum":[24],"voltage":[25],"log-domain":[26],"Seevinck's":[27],"integrator,":[28],"where":[29],"devices":[30],"operate":[31],"in":[32],"weak":[33],"inversion,":[34],"so":[35],"that":[36,52],"model":[37],"equations,":[38],"required":[39],"bias":[40],"conditions":[41],"and":[42,50,63,74],"circuit":[43],"architecture":[44],"lead":[45],"nonposynomial":[47],"general":[48],"equations":[49],"restrictions":[51],"are":[53],"represented":[54],"by":[55],"nonconvex":[56],"functions.":[57],"The":[58],"problem":[60],"is":[61,68,79],"formulated":[62],"MATLAB":[65],"toolbox":[67],"used":[69],"find":[71],"transistor":[72],"dimensions":[73],"biasing":[75],"currents.":[76],"Circuit":[77],"simulation":[78],"performed":[80],"with":[81],"these":[82],"results.":[83]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}