{"id":"https://openalex.org/W1972202784","doi":"https://doi.org/10.1145/2016604.2016645","title":"Performing bitwise logic operations in cache using spintronics-based magnetic tunnel junctions","display_name":"Performing bitwise logic operations in cache using spintronics-based magnetic tunnel junctions","publication_year":2011,"publication_date":"2011-05-03","ids":{"openalex":"https://openalex.org/W1972202784","doi":"https://doi.org/10.1145/2016604.2016645","mag":"1972202784"},"language":"en","primary_location":{"id":"doi:10.1145/2016604.2016645","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2016604.2016645","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 8th ACM International Conference on Computing Frontiers","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111880699","display_name":"Shruti Patil","orcid":null},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Shruti Patil","raw_affiliation_strings":["University of Minnesota, Minneapolis, MN","University of Minnesota , Minneapolis, Mn"],"affiliations":[{"raw_affiliation_string":"University of Minnesota, Minneapolis, MN","institution_ids":["https://openalex.org/I130238516"]},{"raw_affiliation_string":"University of Minnesota , Minneapolis, Mn","institution_ids":["https://openalex.org/I130238516"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5090091276","display_name":"David J. Lilja","orcid":"https://orcid.org/0000-0003-3785-8206"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"David J. Lilja","raw_affiliation_strings":["University of Minnesota, Minneapolis, MN","University of Minnesota , Minneapolis, Mn"],"affiliations":[{"raw_affiliation_string":"University of Minnesota, Minneapolis, MN","institution_ids":["https://openalex.org/I130238516"]},{"raw_affiliation_string":"University of Minnesota , Minneapolis, Mn","institution_ids":["https://openalex.org/I130238516"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5111880699"],"corresponding_institution_ids":["https://openalex.org/I130238516"],"apc_list":null,"apc_paid":null,"fwci":0.5299,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.68290948,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"9"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.733703076839447},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.4835891127586365},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4801011383533478},{"id":"https://openalex.org/keywords/logic-block","display_name":"Logic block","score":0.4330160915851593},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.43159589171409607},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.40897852182388306},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.38054290413856506},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.20260661840438843},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.19045627117156982}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.733703076839447},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.4835891127586365},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4801011383533478},{"id":"https://openalex.org/C2778325283","wikidata":"https://www.wikidata.org/wiki/Q1125244","display_name":"Logic block","level":3,"score":0.4330160915851593},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.43159589171409607},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.40897852182388306},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.38054290413856506},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.20260661840438843},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.19045627117156982}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2016604.2016645","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2016604.2016645","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 8th ACM International Conference on Computing Frontiers","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W1569499730","https://openalex.org/W1964504828","https://openalex.org/W1967393072","https://openalex.org/W1983816564","https://openalex.org/W1988912621","https://openalex.org/W2008904077","https://openalex.org/W2014987330","https://openalex.org/W2022691368","https://openalex.org/W2023605844","https://openalex.org/W2038165255","https://openalex.org/W2081460098","https://openalex.org/W2113855826","https://openalex.org/W2148274083","https://openalex.org/W2149623497","https://openalex.org/W2162271340","https://openalex.org/W2181609752","https://openalex.org/W2313373905","https://openalex.org/W2543205889","https://openalex.org/W6634249399"],"related_works":["https://openalex.org/W1966764473","https://openalex.org/W2098419840","https://openalex.org/W2526300902","https://openalex.org/W2121963733","https://openalex.org/W1977171228","https://openalex.org/W4251323573","https://openalex.org/W2120397377","https://openalex.org/W2170504327","https://openalex.org/W2039093878","https://openalex.org/W1990901299"],"abstract_inverted_index":{"Recent":[0],"exciting":[1],"developments":[2],"in":[3,13,32,91,141,159,175],"the":[4,29,46,50,83,103,107,115,127,142,146,152,156,163,170,173,189,199,209],"emerging":[5],"field":[6],"of":[7,49,62,72,85,131,165,172,177,193,201],"spintronics":[8],"have":[9,36],"enabled":[10],"rapid":[11],"advances":[12],"spintronic":[14,47,93,204],"devices":[15,31,90,148],"such":[16,59],"as":[17,28,60],"magnetic":[18],"tunnel":[19],"junctions":[20],"(MTJs).":[21],"While":[22],"MTJs":[23],"are":[24],"being":[25],"primarily":[26],"used":[27],"basic":[30,128],"non-volatile":[33],"memory,":[34],"they":[35],"also":[37],"been":[38],"shown":[39],"to":[40,56,76,109,168],"accomplish":[41,57],"primitive":[42],"logic":[43,51,63,112,129,157,195],"functions.":[44],"However,":[45],"nature":[48],"operation":[52],"makes":[53],"it":[54,119],"challenging":[55],"tasks":[58],"cascading":[61],"gates,":[64],"operations":[65,113,130,137,158,174],"on":[66,114],"multiple":[67],"outputs,":[68],"and":[69,135,161,183,207],"various":[70],"combinations":[71],"these.":[73],"In":[74],"order":[75],"enable":[77],"these":[78,194],"primary":[79],"functions,":[80,196],"we":[81,100,197],"propose":[82,198],"idea":[84],"adding":[86],"interconnections":[87],"between":[88],"MTJ":[89],"a":[92,166,202],"memory":[94,104,143,147,160,179],"array.":[95],"With":[96],"this":[97],"added":[98],"connectivity,":[99],"show":[101],"that":[102,126],"array":[105,144],"gains":[106],"ability":[108],"perform":[110],"bitwise":[111],"data":[116,181],"stored":[117],"within":[118],"without":[120],"intermediate":[121],"computing":[122],"circuits.":[123],"We":[124,150],"demonstrate":[125,208],"NAND,":[132],"AND,":[133],"OR":[134],"XOR":[136],"can":[138],"be":[139],"performed":[140],"using":[145],"themselves.":[149],"describe":[151],"algorithms":[153],"for":[154],"performing":[155],"introduce":[162],"notion":[164],"'footprint'":[167],"compare":[169],"complexities":[171],"terms":[176],"their":[178],"usage,":[180],"requirements":[182,192],"time":[184],"steps.":[185],"Taking":[186],"into":[187],"account":[188],"minimum":[190],"interconnection":[191],"design":[200],"general":[203],"logic-in-cache":[205],"block":[206],"ADD":[210],"function":[211],"with":[212],"it.":[213]},"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
