{"id":"https://openalex.org/W1985425711","doi":"https://doi.org/10.1145/1973009.1973065","title":"Impact of positive bias temperature instability (PBTI) on 3T1D-DRAM cells","display_name":"Impact of positive bias temperature instability (PBTI) on 3T1D-DRAM cells","publication_year":2011,"publication_date":"2011-05-02","ids":{"openalex":"https://openalex.org/W1985425711","doi":"https://doi.org/10.1145/1973009.1973065","mag":"1985425711"},"language":"en","primary_location":{"id":"doi:10.1145/1973009.1973065","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1973009.1973065","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5067775006","display_name":"Nivard Aymerich","orcid":null},"institutions":[{"id":"https://openalex.org/I4210136471","display_name":"FC Barcelona","ror":"https://ror.org/04bpz1v84","country_code":"ES","type":"other","lineage":["https://openalex.org/I4210136471"]},{"id":"https://openalex.org/I9617848","display_name":"Universitat Polit\u00e8cnica de Catalunya","ror":"https://ror.org/03mb6wj31","country_code":"ES","type":"education","lineage":["https://openalex.org/I9617848"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Nivard Aymerich","raw_affiliation_strings":["UPC Barcelona Tech, Barcelona, Spain","(UPC-Barcelona Tech, Barcelona, Spain.)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"UPC Barcelona Tech, Barcelona, Spain","institution_ids":["https://openalex.org/I9617848","https://openalex.org/I4210136471"]},{"raw_affiliation_string":"(UPC-Barcelona Tech, Barcelona, Spain.)","institution_ids":["https://openalex.org/I9617848"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5077891479","display_name":"Shrikanth Ganapathy","orcid":null},"institutions":[{"id":"https://openalex.org/I4210136471","display_name":"FC Barcelona","ror":"https://ror.org/04bpz1v84","country_code":"ES","type":"other","lineage":["https://openalex.org/I4210136471"]},{"id":"https://openalex.org/I9617848","display_name":"Universitat Polit\u00e8cnica de Catalunya","ror":"https://ror.org/03mb6wj31","country_code":"ES","type":"education","lineage":["https://openalex.org/I9617848"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Shrikanth Ganapathy","raw_affiliation_strings":["UPC Barcelona Tech, Barcelona, Spain","(UPC-Barcelona Tech, Barcelona, Spain.)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"UPC Barcelona Tech, Barcelona, Spain","institution_ids":["https://openalex.org/I9617848","https://openalex.org/I4210136471"]},{"raw_affiliation_string":"(UPC-Barcelona Tech, Barcelona, Spain.)","institution_ids":["https://openalex.org/I9617848"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063332575","display_name":"Antonio Rubio","orcid":"https://orcid.org/0000-0003-1625-1472"},"institutions":[{"id":"https://openalex.org/I4210136471","display_name":"FC Barcelona","ror":"https://ror.org/04bpz1v84","country_code":"ES","type":"other","lineage":["https://openalex.org/I4210136471"]},{"id":"https://openalex.org/I9617848","display_name":"Universitat Polit\u00e8cnica de Catalunya","ror":"https://ror.org/03mb6wj31","country_code":"ES","type":"education","lineage":["https://openalex.org/I9617848"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Antonio Rubio","raw_affiliation_strings":["UPC Barcelona Tech, Barcelona, Spain","(UPC-Barcelona Tech, Barcelona, Spain.)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"UPC Barcelona Tech, Barcelona, Spain","institution_ids":["https://openalex.org/I9617848","https://openalex.org/I4210136471"]},{"raw_affiliation_string":"(UPC-Barcelona Tech, Barcelona, Spain.)","institution_ids":["https://openalex.org/I9617848"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036543571","display_name":"Ram\u00f3n Canal","orcid":"https://orcid.org/0000-0003-4542-204X"},"institutions":[{"id":"https://openalex.org/I4210136471","display_name":"FC Barcelona","ror":"https://ror.org/04bpz1v84","country_code":"ES","type":"other","lineage":["https://openalex.org/I4210136471"]},{"id":"https://openalex.org/I9617848","display_name":"Universitat Polit\u00e8cnica de Catalunya","ror":"https://ror.org/03mb6wj31","country_code":"ES","type":"education","lineage":["https://openalex.org/I9617848"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Ramon Canal","raw_affiliation_strings":["UPC Barcelona Tech, Barcelona, Spain","(UPC-Barcelona Tech, Barcelona, Spain.)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"UPC Barcelona Tech, Barcelona, Spain","institution_ids":["https://openalex.org/I9617848","https://openalex.org/I4210136471"]},{"raw_affiliation_string":"(UPC-Barcelona Tech, Barcelona, Spain.)","institution_ids":["https://openalex.org/I9617848"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100733331","display_name":"Antonio Gonz\u00e1lez","orcid":"https://orcid.org/0000-0002-0009-0996"},"institutions":[{"id":"https://openalex.org/I4210136471","display_name":"FC Barcelona","ror":"https://ror.org/04bpz1v84","country_code":"ES","type":"other","lineage":["https://openalex.org/I4210136471"]},{"id":"https://openalex.org/I9617848","display_name":"Universitat Polit\u00e8cnica de Catalunya","ror":"https://ror.org/03mb6wj31","country_code":"ES","type":"education","lineage":["https://openalex.org/I9617848"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Antonio Gonz\u00e1lez","raw_affiliation_strings":["Intel Labs &amp; UPC Barcelona Tech, Barcelona, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Labs &amp; UPC Barcelona Tech, Barcelona, Spain","institution_ids":["https://openalex.org/I9617848","https://openalex.org/I4210136471"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.3315,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.81777873,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"277","last_page":"282"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.8822966814041138},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.8322799205780029},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6552829742431641},{"id":"https://openalex.org/keywords/instability","display_name":"Instability","score":0.601908266544342},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5982791781425476},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.5707927942276001},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5316416025161743},{"id":"https://openalex.org/keywords/memory-cell","display_name":"Memory cell","score":0.5068607926368713},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.497609406709671},{"id":"https://openalex.org/keywords/degradation","display_name":"Degradation (telecommunications)","score":0.4885929226875305},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.48830318450927734},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.4276614189147949},{"id":"https://openalex.org/keywords/access-time","display_name":"Access time","score":0.4199945330619812},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.40770596265792847},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.32958030700683594},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.3270456790924072},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.30594009160995483},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.30477893352508545},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.30074620246887207},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2745729982852936},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1948947310447693},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.12463074922561646},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.11900043487548828},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08291980624198914}],"concepts":[{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.8822966814041138},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.8322799205780029},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6552829742431641},{"id":"https://openalex.org/C207821765","wikidata":"https://www.wikidata.org/wiki/Q405372","display_name":"Instability","level":2,"score":0.601908266544342},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5982791781425476},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.5707927942276001},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5316416025161743},{"id":"https://openalex.org/C2776638159","wikidata":"https://www.wikidata.org/wiki/Q18343761","display_name":"Memory cell","level":4,"score":0.5068607926368713},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.497609406709671},{"id":"https://openalex.org/C2779679103","wikidata":"https://www.wikidata.org/wiki/Q5251805","display_name":"Degradation (telecommunications)","level":2,"score":0.4885929226875305},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.48830318450927734},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.4276614189147949},{"id":"https://openalex.org/C194080101","wikidata":"https://www.wikidata.org/wiki/Q46306","display_name":"Access time","level":2,"score":0.4199945330619812},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.40770596265792847},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.32958030700683594},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.3270456790924072},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.30594009160995483},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.30477893352508545},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.30074620246887207},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2745729982852936},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1948947310447693},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.12463074922561646},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.11900043487548828},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08291980624198914},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C57879066","wikidata":"https://www.wikidata.org/wiki/Q41217","display_name":"Mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/1973009.1973065","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1973009.1973065","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI","raw_type":"proceedings-article"},{"id":"pmh:oai:upcommons.upc.edu:2117/14433","is_oa":false,"landing_page_url":"http://hdl.handle.net/2117/14433","pdf_url":null,"source":{"id":"https://openalex.org/S4377196262","display_name":"UPCommons institutional repository (Universitat Polit\u00e8cnica de Catalunya)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I9617848","host_organization_name":"Universitat Polit\u00e8cnica de Catalunya","host_organization_lineage":["https://openalex.org/I9617848"],"host_organization_lineage_names":[],"type":"repository"},"license":"public-domain","license_id":"https://openalex.org/licenses/public-domain","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Conference report"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.6399999856948853}],"awards":[],"funders":[{"id":"https://openalex.org/F4320322930","display_name":"Ministerio de Ciencia e Innovaci\u00f3n","ror":"https://ror.org/034900433"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1491237044","https://openalex.org/W1966565831","https://openalex.org/W1986415905","https://openalex.org/W1992129270","https://openalex.org/W2064979487","https://openalex.org/W2102785080","https://openalex.org/W2106834594","https://openalex.org/W2117099087","https://openalex.org/W2118168173","https://openalex.org/W2118366390","https://openalex.org/W2120336067","https://openalex.org/W2132621842","https://openalex.org/W2149866574","https://openalex.org/W2150283124","https://openalex.org/W3094065274","https://openalex.org/W3146730426","https://openalex.org/W6677606438","https://openalex.org/W6677969675"],"related_works":["https://openalex.org/W2080843961","https://openalex.org/W2172029144","https://openalex.org/W3011606802","https://openalex.org/W1521345290","https://openalex.org/W2186356227","https://openalex.org/W1504951709","https://openalex.org/W2907793170","https://openalex.org/W4323831463","https://openalex.org/W2120093897","https://openalex.org/W3205888584"],"abstract_inverted_index":{"Memory":[0],"circuits":[1],"are":[2],"playing":[3],"a":[4,23,69],"key":[5],"role":[6],"in":[7,39],"complex":[8],"multicore":[9],"systems":[10],"with":[11,100],"both":[12],"data":[13,60],"and":[14,17,91,111],"instructions":[15],"storage":[16],"mailbox":[18],"communication":[19],"functions.":[20],"There":[21],"is":[22,67],"general":[24],"concern":[25],"that":[26],"conventional":[27],"SRAM":[28],"cell":[29,64,98],"based":[30],"on":[31,88,124],"the":[32,45,62,79,82,89,95,112,115,119,122,125],"6T":[33,74],"structure":[34],"could":[35],"exhibit":[36],"serious":[37],"limitations":[38],"future":[40],"CMOS":[41],"technologies":[42],"due":[43],"to":[44,72],"instability":[46],"caused":[47,117],"by":[48,118],"transistor":[49],"mismatching":[50],"as":[51,53],"well":[52],"for":[54],"leakage":[55],"consumption":[56],"reasons.":[57],"For":[58],"L1":[59],"caches":[61],"new":[63],"3T1D":[65,96],"DRAM":[66],"considered":[68],"potential":[70],"candidate":[71],"substitute":[73],"SRAMs.":[75],"We":[76],"first":[77],"evaluate":[78],"impact":[80],"of":[81,94,109,114,121],"positive":[83],"bias":[84],"temperature":[85],"instability,":[86],"PBTI,":[87],"access":[90],"retention":[92],"time":[93],"memory":[97],"implemented":[99],"45":[101],"nm":[102],"technology.":[103],"Then,":[104],"we":[105],"consider":[106],"all":[107],"sources":[108],"variations":[110],"effect":[113],"degradation":[116],"aging":[120],"device":[123],"yield":[126],"at":[127],"system":[128],"level.":[129]},"counts_by_year":[{"year":2014,"cited_by_count":2},{"year":2012,"cited_by_count":3}],"updated_date":"2026-07-02T09:51:11.867554","created_date":"2025-10-10T00:00:00"}
