{"id":"https://openalex.org/W2049121968","doi":"https://doi.org/10.1145/1950413.1950434","title":"A 65nm flash-based FPGA fabric optimized for low cost and power","display_name":"A 65nm flash-based FPGA fabric optimized for low cost and power","publication_year":2011,"publication_date":"2011-02-27","ids":{"openalex":"https://openalex.org/W2049121968","doi":"https://doi.org/10.1145/1950413.1950434","mag":"2049121968"},"language":"en","primary_location":{"id":"doi:10.1145/1950413.1950434","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1950413.1950434","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5076157491","display_name":"Jonathan Greene","orcid":"https://orcid.org/0000-0002-7038-6629"},"institutions":[{"id":"https://openalex.org/I4210110187","display_name":"Microsemi (United States)","ror":"https://ror.org/01mvkzj41","country_code":"US","type":"company","lineage":["https://openalex.org/I4210110187"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Jonathan Greene","raw_affiliation_strings":["Microsemi Corporation SOC Products Group, Mountain View, CA, USA"],"affiliations":[{"raw_affiliation_string":"Microsemi Corporation SOC Products Group, Mountain View, CA, USA","institution_ids":["https://openalex.org/I4210110187"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5024157591","display_name":"Sinan Kaptanoglu","orcid":null},"institutions":[{"id":"https://openalex.org/I4210110187","display_name":"Microsemi (United States)","ror":"https://ror.org/01mvkzj41","country_code":"US","type":"company","lineage":["https://openalex.org/I4210110187"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sinan Kaptanoglu","raw_affiliation_strings":["Microsemi Corporation SOC Products Group, Mountain View, CA, USA"],"affiliations":[{"raw_affiliation_string":"Microsemi Corporation SOC Products Group, Mountain View, CA, USA","institution_ids":["https://openalex.org/I4210110187"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100852727","display_name":"Wenyi Feng","orcid":null},"institutions":[{"id":"https://openalex.org/I4210110187","display_name":"Microsemi (United States)","ror":"https://ror.org/01mvkzj41","country_code":"US","type":"company","lineage":["https://openalex.org/I4210110187"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Wenyi Feng","raw_affiliation_strings":["Microsemi Corporation SOC Products Group, Mountain View, CA, USA"],"affiliations":[{"raw_affiliation_string":"Microsemi Corporation SOC Products Group, Mountain View, CA, USA","institution_ids":["https://openalex.org/I4210110187"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066668739","display_name":"V. Hecht","orcid":null},"institutions":[{"id":"https://openalex.org/I4210110187","display_name":"Microsemi (United States)","ror":"https://ror.org/01mvkzj41","country_code":"US","type":"company","lineage":["https://openalex.org/I4210110187"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Volker Hecht","raw_affiliation_strings":["Microsemi Corporation SOC Products Group, Mountain View, CA, USA"],"affiliations":[{"raw_affiliation_string":"Microsemi Corporation SOC Products Group, Mountain View, CA, USA","institution_ids":["https://openalex.org/I4210110187"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058388512","display_name":"Joel Landry","orcid":null},"institutions":[{"id":"https://openalex.org/I4210110187","display_name":"Microsemi (United States)","ror":"https://ror.org/01mvkzj41","country_code":"US","type":"company","lineage":["https://openalex.org/I4210110187"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Joel Landry","raw_affiliation_strings":["Microsemi Corporation SOC Products Group, Mountain View, CA, USA"],"affiliations":[{"raw_affiliation_string":"Microsemi Corporation SOC Products Group, Mountain View, CA, USA","institution_ids":["https://openalex.org/I4210110187"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100325833","display_name":"Fei Li","orcid":"https://orcid.org/0000-0002-5473-5649"},"institutions":[{"id":"https://openalex.org/I4210110187","display_name":"Microsemi (United States)","ror":"https://ror.org/01mvkzj41","country_code":"US","type":"company","lineage":["https://openalex.org/I4210110187"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Fei Li","raw_affiliation_strings":["Microsemi Corporation SOC Products Group, Mountain View, CA, USA"],"affiliations":[{"raw_affiliation_string":"Microsemi Corporation SOC Products Group, Mountain View, CA, USA","institution_ids":["https://openalex.org/I4210110187"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5026385678","display_name":"Anton Krouglyanskiy","orcid":null},"institutions":[{"id":"https://openalex.org/I4210110187","display_name":"Microsemi (United States)","ror":"https://ror.org/01mvkzj41","country_code":"US","type":"company","lineage":["https://openalex.org/I4210110187"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Anton Krouglyanskiy","raw_affiliation_strings":["Microsemi Corporation SOC Products Group, Mountain View, CA, USA"],"affiliations":[{"raw_affiliation_string":"Microsemi Corporation SOC Products Group, Mountain View, CA, USA","institution_ids":["https://openalex.org/I4210110187"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5068398261","display_name":"Mihai Morosan","orcid":null},"institutions":[{"id":"https://openalex.org/I4210110187","display_name":"Microsemi (United States)","ror":"https://ror.org/01mvkzj41","country_code":"US","type":"company","lineage":["https://openalex.org/I4210110187"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mihai Morosan","raw_affiliation_strings":["Microsemi Corporation SOC Products Group, Mountain View, CA, USA"],"affiliations":[{"raw_affiliation_string":"Microsemi Corporation SOC Products Group, Mountain View, CA, USA","institution_ids":["https://openalex.org/I4210110187"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5070951209","display_name":"Val Pevzner","orcid":null},"institutions":[{"id":"https://openalex.org/I4210110187","display_name":"Microsemi (United States)","ror":"https://ror.org/01mvkzj41","country_code":"US","type":"company","lineage":["https://openalex.org/I4210110187"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Val Pevzner","raw_affiliation_strings":["Microsemi Corporation SOC Products Group, Mountain View, CA, USA"],"affiliations":[{"raw_affiliation_string":"Microsemi Corporation SOC Products Group, Mountain View, CA, USA","institution_ids":["https://openalex.org/I4210110187"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":9,"corresponding_author_ids":["https://openalex.org/A5076157491"],"corresponding_institution_ids":["https://openalex.org/I4210110187"],"apc_list":null,"apc_paid":null,"fwci":1.3248,"has_fulltext":false,"cited_by_count":35,"citation_normalized_percentile":{"value":0.82341604,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"87","last_page":"96"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/flash","display_name":"Flash (photography)","score":0.7719536423683167},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7209396362304688},{"id":"https://openalex.org/keywords/flash-memory","display_name":"Flash memory","score":0.7100766897201538},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7088913917541504},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6744809150695801},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.5752995610237122},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5312321782112122},{"id":"https://openalex.org/keywords/flash-file-system","display_name":"Flash file system","score":0.5139641165733337},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.5078423619270325},{"id":"https://openalex.org/keywords/lookup-table","display_name":"Lookup table","score":0.5070309638977051},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.5049143433570862},{"id":"https://openalex.org/keywords/flash-memory-emulator","display_name":"Flash memory emulator","score":0.45779353380203247},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4483203589916229},{"id":"https://openalex.org/keywords/universal-memory","display_name":"Universal memory","score":0.4235721230506897},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.41717109084129333},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.25003743171691895},{"id":"https://openalex.org/keywords/computer-memory","display_name":"Computer memory","score":0.21301913261413574},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.11590901017189026},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.1091354489326477},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.08204761147499084}],"concepts":[{"id":"https://openalex.org/C2777526259","wikidata":"https://www.wikidata.org/wiki/Q221836","display_name":"Flash (photography)","level":2,"score":0.7719536423683167},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7209396362304688},{"id":"https://openalex.org/C2776531357","wikidata":"https://www.wikidata.org/wiki/Q174077","display_name":"Flash memory","level":2,"score":0.7100766897201538},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7088913917541504},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6744809150695801},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.5752995610237122},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5312321782112122},{"id":"https://openalex.org/C27670709","wikidata":"https://www.wikidata.org/wiki/Q5457555","display_name":"Flash file system","level":4,"score":0.5139641165733337},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.5078423619270325},{"id":"https://openalex.org/C134835016","wikidata":"https://www.wikidata.org/wiki/Q690265","display_name":"Lookup table","level":2,"score":0.5070309638977051},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.5049143433570862},{"id":"https://openalex.org/C96535780","wikidata":"https://www.wikidata.org/wiki/Q5457561","display_name":"Flash memory emulator","level":5,"score":0.45779353380203247},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4483203589916229},{"id":"https://openalex.org/C195053848","wikidata":"https://www.wikidata.org/wiki/Q7894141","display_name":"Universal memory","level":5,"score":0.4235721230506897},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.41717109084129333},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.25003743171691895},{"id":"https://openalex.org/C92855701","wikidata":"https://www.wikidata.org/wiki/Q5830907","display_name":"Computer memory","level":3,"score":0.21301913261413574},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.11590901017189026},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.1091354489326477},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.08204761147499084},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1950413.1950434","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1950413.1950434","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.5400000214576721}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1522950391","https://openalex.org/W1523051745","https://openalex.org/W1607821725","https://openalex.org/W1984291278","https://openalex.org/W2040166817","https://openalex.org/W2057859842","https://openalex.org/W2096313289","https://openalex.org/W2097521167","https://openalex.org/W2105967587","https://openalex.org/W2109918961","https://openalex.org/W2115310818","https://openalex.org/W2140973477","https://openalex.org/W2170564220","https://openalex.org/W2484221342","https://openalex.org/W6631410163"],"related_works":["https://openalex.org/W1691732600","https://openalex.org/W2089246213","https://openalex.org/W2156647345","https://openalex.org/W2534239836","https://openalex.org/W126194223","https://openalex.org/W2351288090","https://openalex.org/W2121842885","https://openalex.org/W2089922579","https://openalex.org/W1908804015","https://openalex.org/W1979327497"],"abstract_inverted_index":{"This":[0],"paper":[1],"describes":[2],"a":[3,72,140],"non-volatile":[4],"reprogrammable":[5],"FPGA":[6],"fabric,":[7],"whose":[8],"configuration":[9,35],"data":[10],"are":[11],"provided":[12],"directly":[13],"by":[14,101,121],"flash":[15,29,48,56,132,144],"memory.":[16,133],"The":[17,69,134],"fabric":[18,67,135],"is":[19,58,99,119],"optimized":[20],"for":[21],"low-cost,":[22],"low-power":[23],"applications,":[24],"leveraging":[25],"the":[26,31,44,54,66,94,104,112,131],"density":[27],"of":[28,33,65,71,75,111],"and":[30,37,49,80,87,108],"elimination":[32],"conventional":[34],"SRAM":[36],"its":[38,50],"attendant":[39],"static":[40],"power.":[41],"After":[42],"surveying":[43],"necessary":[45],"background":[46],"on":[47],"application":[51],"to":[52,84],"FPGAs,":[53],"1T":[55],"cell":[57],"described":[59],"along":[60],"with":[61],"relevant":[62],"novel":[63],"aspects":[64],"architecture.":[68],"addition":[70],"third":[73],"level":[74],"switching":[76],"between":[77,103],"inter-cluster":[78],"signals":[79],"logic":[81],"inputs":[82],"helps":[83],"reduce":[85],"area":[86],"raise":[88],"typical":[89],"utilization":[90],"above":[91],"95%.":[92],"Despite":[93],"longer":[95],"signal":[96],"path,":[97],"performance":[98],"maintained":[100],"synergism":[102],"improved":[105],"routing":[106],"flexibility":[107],"extreme":[109],"minimization":[110],"fastest":[113],"LUT":[114],"input":[115],"delay.":[116],"Test":[117],"cost":[118],"reduced":[120],"built-in":[122],"circuits":[123],"that":[124],"can":[125],"test":[126],"all":[127],"switches":[128],"without":[129],"reprogramming":[130],"has":[136],"been":[137],"implemented":[138],"in":[139],"65nm":[141],"CMOS":[142],"embedded":[143],"process.":[145]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":5},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":4},{"year":2014,"cited_by_count":3},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}