{"id":"https://openalex.org/W2072974923","doi":"https://doi.org/10.1145/1950413.1950427","title":"FPGASort","display_name":"FPGASort","publication_year":2011,"publication_date":"2011-02-27","ids":{"openalex":"https://openalex.org/W2072974923","doi":"https://doi.org/10.1145/1950413.1950427","mag":"2072974923"},"language":"en","primary_location":{"id":"doi:10.1145/1950413.1950427","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1950413.1950427","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5064000482","display_name":"Dirk Koch","orcid":"https://orcid.org/0000-0002-2568-4432"},"institutions":[{"id":"https://openalex.org/I184942183","display_name":"University of Oslo","ror":"https://ror.org/01xtthb56","country_code":"NO","type":"education","lineage":["https://openalex.org/I184942183"]}],"countries":["NO"],"is_corresponding":false,"raw_author_name":"Dirk Koch","raw_affiliation_strings":["University of Oslo, Oslo, Norway"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Oslo, Oslo, Norway","institution_ids":["https://openalex.org/I184942183"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5071144214","display_name":"Jim T\u00f8rresen","orcid":"https://orcid.org/0000-0003-0556-0288"},"institutions":[{"id":"https://openalex.org/I184942183","display_name":"University of Oslo","ror":"https://ror.org/01xtthb56","country_code":"NO","type":"education","lineage":["https://openalex.org/I184942183"]}],"countries":["NO"],"is_corresponding":false,"raw_author_name":"Jim Torresen","raw_affiliation_strings":["University of Oslo, Oslo, Norway"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Oslo, Oslo, Norway","institution_ids":["https://openalex.org/I184942183"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I184942183"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":168,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"45","last_page":"54"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11269","display_name":"Algorithms and Data Compression","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8164651393890381},{"id":"https://openalex.org/keywords/merge-sort","display_name":"Merge sort","score":0.7184863686561584},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.6915274262428284},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6866979598999023},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6453678607940674},{"id":"https://openalex.org/keywords/sorting","display_name":"Sorting","score":0.581713855266571},{"id":"https://openalex.org/keywords/merge","display_name":"Merge (version control)","score":0.5677824020385742},{"id":"https://openalex.org/keywords/merge-algorithm","display_name":"Merge algorithm","score":0.5274612903594971},{"id":"https://openalex.org/keywords/sorting-algorithm","display_name":"Sorting algorithm","score":0.4665123522281647},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4581223726272583},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.4127488136291504},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.39236706495285034},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.161493718624115}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8164651393890381},{"id":"https://openalex.org/C35555965","wikidata":"https://www.wikidata.org/wiki/Q189057","display_name":"Merge sort","level":4,"score":0.7184863686561584},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.6915274262428284},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6866979598999023},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6453678607940674},{"id":"https://openalex.org/C111696304","wikidata":"https://www.wikidata.org/wiki/Q2303697","display_name":"Sorting","level":2,"score":0.581713855266571},{"id":"https://openalex.org/C197129107","wikidata":"https://www.wikidata.org/wiki/Q1921621","display_name":"Merge (version control)","level":2,"score":0.5677824020385742},{"id":"https://openalex.org/C140086265","wikidata":"https://www.wikidata.org/wiki/Q11341754","display_name":"Merge algorithm","level":4,"score":0.5274612903594971},{"id":"https://openalex.org/C108094655","wikidata":"https://www.wikidata.org/wiki/Q181593","display_name":"Sorting algorithm","level":3,"score":0.4665123522281647},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4581223726272583},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.4127488136291504},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.39236706495285034},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.161493718624115}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1950413.1950427","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1950413.1950427","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Responsible consumption and production","id":"https://metadata.un.org/sdg/12","score":0.4399999976158142}],"awards":[],"funders":[{"id":"https://openalex.org/F4320323299","display_name":"Norges Forskningsr\u00e5d","ror":"https://ror.org/00epmv149"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1532234100","https://openalex.org/W1544703684","https://openalex.org/W1608570110","https://openalex.org/W1974796034","https://openalex.org/W2036073865","https://openalex.org/W2107470992","https://openalex.org/W2108907376","https://openalex.org/W2119547137","https://openalex.org/W2127766448","https://openalex.org/W2141389982","https://openalex.org/W2160204225","https://openalex.org/W2167588340","https://openalex.org/W2544967892"],"related_works":["https://openalex.org/W2925598649","https://openalex.org/W4320925713","https://openalex.org/W2190513794","https://openalex.org/W2540352350","https://openalex.org/W2011379812","https://openalex.org/W3014215895","https://openalex.org/W2765396134","https://openalex.org/W3002580575","https://openalex.org/W2140238930","https://openalex.org/W1606108344"],"abstract_inverted_index":{"This":[0],"paper":[1],"analyses":[2],"different":[3],"hardware":[4],"sorting":[5,84,113],"architectures":[6],"in":[7,27,49],"order":[8],"to":[9,23],"implement":[10],"a":[11,36,39,44,82],"highly":[12],"scaleable":[13],"sorter":[14,42,47],"for":[15,67,76,88],"solving":[16],"huge":[17],"problems":[18,89],"at":[19,53],"high":[20],"performance":[21,52],"up":[22],"the":[24,50,71,78,92,106,119],"GB":[25],"range":[26],"linear":[28],"time":[29],"complexity.":[30],"It":[31],"will":[32,58],"be":[33,65],"proven":[34],"that":[35],"combination":[37],"of":[38,86],"FIFO-based":[40],"merge":[41,46],"and":[43,96,118],"tree-based":[45],"results":[48,109],"best":[51,107],"low":[54],"cost.":[55],"Moreover,":[56],"we":[57],"demonstrate":[59],"how":[60],"partial":[61],"run-time":[62],"reconfiguration":[63],"can":[64],"used":[66],"saving":[68],"almost":[69],"half":[70],"FPGA":[72,94],"resources":[73],"or":[74],"alternatively":[75],"improving":[77],"speed.":[79],"Experiments":[80],"show":[81],"sustainable":[83],"throughput":[85],"2GB/s":[87],"fitting":[90],"into":[91],"on-chip":[93],"memory":[95],"1":[97],"GB/s":[98],"when":[99],"using":[100],"external":[101],"memory.":[102],"These":[103],"values":[104],"surpass":[105],"published":[108],"on":[110,115],"large":[111],"problem":[112],"implementations":[114],"FPGAs,":[116],"GPUs,":[117],"Cell":[120],"processor.":[121]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":8},{"year":2021,"cited_by_count":10},{"year":2020,"cited_by_count":15},{"year":2019,"cited_by_count":8},{"year":2018,"cited_by_count":13},{"year":2017,"cited_by_count":21},{"year":2016,"cited_by_count":26},{"year":2015,"cited_by_count":19},{"year":2014,"cited_by_count":12},{"year":2013,"cited_by_count":12},{"year":2012,"cited_by_count":12}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2016-06-24T00:00:00"}