{"id":"https://openalex.org/W2071815918","doi":"https://doi.org/10.1145/1921249.1921259","title":"Contrasting topologies for regular interconnection networks under the constraints of nanoscale silicon technology","display_name":"Contrasting topologies for regular interconnection networks under the constraints of nanoscale silicon technology","publication_year":2010,"publication_date":"2010-12-04","ids":{"openalex":"https://openalex.org/W2071815918","doi":"https://doi.org/10.1145/1921249.1921259","mag":"2071815918"},"language":"en","primary_location":{"id":"doi:10.1145/1921249.1921259","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1921249.1921259","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Third International Workshop on Network on Chip Architectures","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://zenodo.org/record/3438320","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5010239929","display_name":"Daniele Ludovici","orcid":null},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Daniele Ludovici","raw_affiliation_strings":["TU Delft, Delft, The Netherlands","TU-Delft, Delft, the Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TU Delft, Delft, The Netherlands","institution_ids":["https://openalex.org/I98358874"]},{"raw_affiliation_string":"TU-Delft, Delft, the Netherlands","institution_ids":["https://openalex.org/I98358874"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075050234","display_name":"Georgi Gaydadjiev","orcid":"https://orcid.org/0000-0002-3678-7007"},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Georgi N. Gaydadjiev","raw_affiliation_strings":["TU Delft, Delft, The Netherlands","TU-Delft, Delft, the Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TU Delft, Delft, The Netherlands","institution_ids":["https://openalex.org/I98358874"]},{"raw_affiliation_string":"TU-Delft, Delft, the Netherlands","institution_ids":["https://openalex.org/I98358874"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007578102","display_name":"Francisco Jurado Gilabert","orcid":null},"institutions":[{"id":"https://openalex.org/I16097986","display_name":"Universitat de Val\u00e8ncia","ror":"https://ror.org/043nxc105","country_code":"ES","type":"education","lineage":["https://openalex.org/I16097986"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Francisco Gilabert","raw_affiliation_strings":["University of Valencia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Valencia","institution_ids":["https://openalex.org/I16097986"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033867189","display_name":"Mar\u00eda E. G\u00f3mez","orcid":"https://orcid.org/0000-0003-1466-4118"},"institutions":[{"id":"https://openalex.org/I16097986","display_name":"Universitat de Val\u00e8ncia","ror":"https://ror.org/043nxc105","country_code":"ES","type":"education","lineage":["https://openalex.org/I16097986"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Maria E. Gomez","raw_affiliation_strings":["University of Valencia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Valencia","institution_ids":["https://openalex.org/I16097986"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5011268330","display_name":"Davide Bertozzi","orcid":"https://orcid.org/0000-0001-7462-4551"},"institutions":[{"id":"https://openalex.org/I201324441","display_name":"University of Ferrara","ror":"https://ror.org/041zkgm14","country_code":"IT","type":"education","lineage":["https://openalex.org/I201324441"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Davide Bertozzi","raw_affiliation_strings":["University of Ferrara, Ferrara, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Ferrara, Ferrara, Italy","institution_ids":["https://openalex.org/I201324441"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.5868,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.60712621,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"37","last_page":"42"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10179","display_name":"Supercapacitor Materials and Fabrication","score":0.9932000041007996,"subfield":{"id":"https://openalex.org/subfields/2504","display_name":"Electronic, Optical and Magnetic Materials"},"field":{"id":"https://openalex.org/fields/25","display_name":"Materials Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10083","display_name":"Graphene research and applications","score":0.9922999739646912,"subfield":{"id":"https://openalex.org/subfields/2505","display_name":"Materials Chemistry"},"field":{"id":"https://openalex.org/fields/25","display_name":"Materials Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/network-topology","display_name":"Network topology","score":0.782867431640625},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7027862668037415},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.661851167678833},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.5969541072845459},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.5731201767921448},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.5397568345069885},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5377691984176636},{"id":"https://openalex.org/keywords/mpsoc","display_name":"MPSoC","score":0.5184654593467712},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.5038794875144958},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.39697349071502686},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3908899426460266},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3269478678703308},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1902543008327484},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.18037042021751404},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1253780722618103},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.10943779349327087}],"concepts":[{"id":"https://openalex.org/C199845137","wikidata":"https://www.wikidata.org/wiki/Q145490","display_name":"Network topology","level":2,"score":0.782867431640625},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7027862668037415},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.661851167678833},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.5969541072845459},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.5731201767921448},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.5397568345069885},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5377691984176636},{"id":"https://openalex.org/C2777187653","wikidata":"https://www.wikidata.org/wiki/Q975106","display_name":"MPSoC","level":3,"score":0.5184654593467712},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.5038794875144958},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.39697349071502686},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3908899426460266},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3269478678703308},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1902543008327484},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.18037042021751404},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1253780722618103},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.10943779349327087},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1145/1921249.1921259","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1921249.1921259","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Third International Workshop on Network on Chip Architectures","raw_type":"proceedings-article"},{"id":"pmh:oai:iris.unife.it:11392/1431311","is_oa":false,"landing_page_url":"http://hdl.handle.net/11392/1431311","pdf_url":null,"source":{"id":"https://openalex.org/S4306400369","display_name":"Institutional Research Information System University of Ferrara (University of Ferrara)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I201324441","host_organization_name":"University of Ferrara","host_organization_lineage":["https://openalex.org/I201324441"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"},{"id":"pmh:oai:zenodo.org:3438320","is_oa":true,"landing_page_url":"https://zenodo.org/record/3438320","pdf_url":null,"source":{"id":"https://openalex.org/S4306400562","display_name":"Zenodo (CERN European Organization for Nuclear Research)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I67311998","host_organization_name":"European Organization for Nuclear Research","host_organization_lineage":["https://openalex.org/I67311998"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferencePaper"}],"best_oa_location":{"id":"pmh:oai:zenodo.org:3438320","is_oa":true,"landing_page_url":"https://zenodo.org/record/3438320","pdf_url":null,"source":{"id":"https://openalex.org/S4306400562","display_name":"Zenodo (CERN European Organization for Nuclear Research)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I67311998","host_organization_name":"European Organization for Nuclear Research","host_organization_lineage":["https://openalex.org/I67311998"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferencePaper"},"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.6499999761581421}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":23,"referenced_works":["https://openalex.org/W1481733864","https://openalex.org/W1600358781","https://openalex.org/W1985722570","https://openalex.org/W2003752014","https://openalex.org/W2032911965","https://openalex.org/W2048789167","https://openalex.org/W2118799833","https://openalex.org/W2125357468","https://openalex.org/W2127430446","https://openalex.org/W2133860411","https://openalex.org/W2138843679","https://openalex.org/W2141696932","https://openalex.org/W2143072611","https://openalex.org/W2149368066","https://openalex.org/W2154597424","https://openalex.org/W2156475585","https://openalex.org/W2160642395","https://openalex.org/W2161995522","https://openalex.org/W2165807634","https://openalex.org/W2540500304","https://openalex.org/W6678665702","https://openalex.org/W6683792722","https://openalex.org/W6728718876"],"related_works":["https://openalex.org/W1976012348","https://openalex.org/W2560375935","https://openalex.org/W1980085932","https://openalex.org/W2594964164","https://openalex.org/W2614713859","https://openalex.org/W2002682434","https://openalex.org/W2144357574","https://openalex.org/W4230458348","https://openalex.org/W1966325333","https://openalex.org/W3198758847"],"abstract_inverted_index":{"Nowadays,":[0],"system":[1,125,133],"designers":[2],"have":[3,157,171],"adopted":[4],"Networks-on-Chip":[5],"as":[6],"communication":[7],"infrastructure":[8],"of":[9,45,63,89,122,132,167],"general-purpose":[10],"tile-based":[11],"Multi-Processor":[12],"System-on-Chip":[13],"(MPSoC).":[14],"Such":[15],"decision":[16],"implies":[17],"that":[18],"a":[19,37,43,72,78,97,108,141,176],"certain":[20,142],"topology":[21,48,73,143],"has":[22],"to":[23,26,85,100,112,126,145,149,160,174],"be":[24,146],"selected":[25],"efficiently":[27],"interconnect":[28],"many":[29,60],"cores":[30],"on":[31,77],"the":[32,39,53,86,153],"chip.":[33],"To":[34],"ease":[35],"such":[36,64,163,168],"choice,":[38],"networking":[40],"literature":[41],"offers":[42],"plethora":[44],"works":[46],"about":[47],"analysis":[49,110],"and":[50,59,116,134],"characterization":[51],"for":[52],"off-chip":[54,65],"domain.":[55],"However,":[56],"theoretical":[57],"parameters":[58,136],"intuitive":[61],"assumptions":[62],"networks":[66],"do":[67],"not":[68],"necessarily":[69],"hold":[70],"when":[71],"is":[74,83,96],"laid":[75],"out":[76],"2D":[79],"silicon":[80,90],"surface.":[81],"This":[82,94],"due":[84,148],"distinctive":[87],"features":[88],"technology":[91],"design":[92,138],"pitfalls.":[93],"work":[95],"first":[98],"milestone":[99],"bridge":[101],"this":[102],"gap,":[103],"in":[104],"fact,":[105],"we":[106],"propose":[107],"comprehensive":[109,177],"framework":[111],"assess":[113],"k-ary":[114],"n-mesh":[115],"C-mesh":[117],"topologies":[118],"at":[119],"different":[120],"level":[121],"abstractions,":[123],"from":[124],"layout":[127,135],"level,":[128],"while":[129],"capturing":[130],"implications":[131],"across":[137],"hierarchy.":[139],"When":[140],"proves":[144],"slow":[147],"long":[150],"links":[151],"crossing":[152],"chip,":[154],"pipeline":[155],"stages":[156],"been":[158,172],"inserted":[159],"cope":[161],"with":[162],"slow-down.":[164],"Furthermore,":[165],"costs":[166],"speed-up":[169],"technique":[170],"evaluated":[173],"draw":[175],"performance/area":[178],"figure.":[179]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2015,"cited_by_count":2}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}