{"id":"https://openalex.org/W1986098371","doi":"https://doi.org/10.1145/1872007.1872044","title":"Power optimization for multimedia transcoding on multicore servers","display_name":"Power optimization for multimedia transcoding on multicore servers","publication_year":2010,"publication_date":"2010-10-25","ids":{"openalex":"https://openalex.org/W1986098371","doi":"https://doi.org/10.1145/1872007.1872044","mag":"1986098371"},"language":"en","primary_location":{"id":"doi:10.1145/1872007.1872044","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1872007.1872044","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 6th ACM/IEEE Symposium on Architectures for Networking and Communications Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5011352126","display_name":"Jilong Kuang","orcid":null},"institutions":[{"id":"https://openalex.org/I103635307","display_name":"University of California, Riverside","ror":"https://ror.org/03nawhv43","country_code":"US","type":"education","lineage":["https://openalex.org/I103635307"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Jilong Kuang","raw_affiliation_strings":["Unviersity of California, Riverside, CA","Computer Science & Engineering Department, Unviersity of California, Riverside, 900 University Ave, 92521, USA"],"affiliations":[{"raw_affiliation_string":"Unviersity of California, Riverside, CA","institution_ids":["https://openalex.org/I103635307"]},{"raw_affiliation_string":"Computer Science & Engineering Department, Unviersity of California, Riverside, 900 University Ave, 92521, USA","institution_ids":["https://openalex.org/I103635307"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010909763","display_name":"Danhua Guo","orcid":null},"institutions":[{"id":"https://openalex.org/I103635307","display_name":"University of California, Riverside","ror":"https://ror.org/03nawhv43","country_code":"US","type":"education","lineage":["https://openalex.org/I103635307"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Danhua Guo","raw_affiliation_strings":["Unviersity of California, Riverside, CA","Computer Science & Engineering Department, Unviersity of California, Riverside, 900 University Ave, 92521, USA"],"affiliations":[{"raw_affiliation_string":"Unviersity of California, Riverside, CA","institution_ids":["https://openalex.org/I103635307"]},{"raw_affiliation_string":"Computer Science & Engineering Department, Unviersity of California, Riverside, 900 University Ave, 92521, USA","institution_ids":["https://openalex.org/I103635307"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5048949780","display_name":"Laxmi N. Bhuyan","orcid":"https://orcid.org/0000-0002-8759-0458"},"institutions":[{"id":"https://openalex.org/I103635307","display_name":"University of California, Riverside","ror":"https://ror.org/03nawhv43","country_code":"US","type":"education","lineage":["https://openalex.org/I103635307"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Laxmi Bhuyan","raw_affiliation_strings":["Unviersity of California, Riverside, CA","Computer Science & Engineering Department, Unviersity of California, Riverside, 900 University Ave, 92521, USA"],"affiliations":[{"raw_affiliation_string":"Unviersity of California, Riverside, CA","institution_ids":["https://openalex.org/I103635307"]},{"raw_affiliation_string":"Computer Science & Engineering Department, Unviersity of California, Riverside, 900 University Ave, 92521, USA","institution_ids":["https://openalex.org/I103635307"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5011352126"],"corresponding_institution_ids":["https://openalex.org/I103635307"],"apc_list":null,"apc_paid":null,"fwci":0.4994,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.6458514,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"2"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/transcoding","display_name":"Transcoding","score":0.8026905059814453},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7880566120147705},{"id":"https://openalex.org/keywords/server","display_name":"Server","score":0.7746589779853821},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.7421382069587708},{"id":"https://openalex.org/keywords/frequency-scaling","display_name":"Frequency scaling","score":0.5228203535079956},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.5172070264816284},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5141430497169495},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4890826344490051},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4418644607067108},{"id":"https://openalex.org/keywords/power-gating","display_name":"Power gating","score":0.43918001651763916},{"id":"https://openalex.org/keywords/clock-gating","display_name":"Clock gating","score":0.42962661385536194},{"id":"https://openalex.org/keywords/dynamic-demand","display_name":"Dynamic demand","score":0.4123589098453522},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.38617169857025146},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.28010839223861694},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.25335538387298584},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.10488033294677734},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10273993015289307}],"concepts":[{"id":"https://openalex.org/C134535813","wikidata":"https://www.wikidata.org/wiki/Q1888734","display_name":"Transcoding","level":2,"score":0.8026905059814453},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7880566120147705},{"id":"https://openalex.org/C93996380","wikidata":"https://www.wikidata.org/wiki/Q44127","display_name":"Server","level":2,"score":0.7746589779853821},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.7421382069587708},{"id":"https://openalex.org/C157742956","wikidata":"https://www.wikidata.org/wiki/Q3237776","display_name":"Frequency scaling","level":3,"score":0.5228203535079956},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.5172070264816284},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5141430497169495},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4890826344490051},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4418644607067108},{"id":"https://openalex.org/C2780700455","wikidata":"https://www.wikidata.org/wiki/Q7236515","display_name":"Power gating","level":4,"score":0.43918001651763916},{"id":"https://openalex.org/C22716491","wikidata":"https://www.wikidata.org/wiki/Q590170","display_name":"Clock gating","level":5,"score":0.42962661385536194},{"id":"https://openalex.org/C45872418","wikidata":"https://www.wikidata.org/wiki/Q5318966","display_name":"Dynamic demand","level":3,"score":0.4123589098453522},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.38617169857025146},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.28010839223861694},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.25335538387298584},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.10488033294677734},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10273993015289307},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.0},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.0},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1872007.1872044","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1872007.1872044","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 6th ACM/IEEE Symposium on Architectures for Networking and Communications Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8899999856948853}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W24194832","https://openalex.org/W1976634368","https://openalex.org/W2033721616","https://openalex.org/W2154169726"],"related_works":["https://openalex.org/W2152979262","https://openalex.org/W2485892467","https://openalex.org/W4252084893","https://openalex.org/W1949070338","https://openalex.org/W4390197045","https://openalex.org/W1510566755","https://openalex.org/W4562818","https://openalex.org/W2421981162","https://openalex.org/W4254183379","https://openalex.org/W2377558048"],"abstract_inverted_index":{"We":[0],"design,":[1],"implement":[2],"and":[3,7,32,78,88],"evaluate":[4],"a":[5,57],"power-efficient":[6],"traffic-aware":[8],"transcoding":[9],"system":[10,22,50,59],"on":[11,43],"multicore":[12],"servers":[13],"that":[14,48],"appropriately":[15],"adjusts":[16],"the":[17,27,38],"processor":[18],"operating":[19],"level.":[20],"The":[21],"is":[23],"capable":[24],"of":[25,29,91],"configuring":[26],"number":[28],"active":[30],"cores":[31],"core":[33],"frequency":[34],"\"on-the-fly\"":[35],"according":[36],"to":[37,56],"varying":[39],"traffic":[40],"rate.":[41],"Results":[42],"an":[44],"AMD":[45],"machine":[46],"show":[47],"our":[49],"saves":[51],"51.0%":[52],"power":[53,92],"consumption":[54],"compared":[55],"native":[58],"without":[60],"power-saving":[61],"schemes.":[62],"It":[63],"also":[64],"outperforms":[65],"three":[66],"other":[67],"power-aware":[68],"systems,":[69],"CG":[70],"[2]":[71],"(clock":[72],"gating),":[73],"C-DVFS":[74],"[3]":[75],"(chip-wide":[76,81],"DVFS)":[77],"Hybrid":[79],"[1]":[80],"DVFS":[82],"+":[83],"power-gating),":[84],"by":[85],"19.5%,":[86],"10.5%":[87],"5.5%":[89],"reduction":[90],"consumption,":[93],"respectively.":[94]},"counts_by_year":[{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
