{"id":"https://openalex.org/W2067228559","doi":"https://doi.org/10.1145/1857927.1857932","title":"A Variable-Grain Logic Cell and Routing Architecture for a Reconfigurable IP Core","display_name":"A Variable-Grain Logic Cell and Routing Architecture for a Reconfigurable IP Core","publication_year":2010,"publication_date":"2010-12-01","ids":{"openalex":"https://openalex.org/W2067228559","doi":"https://doi.org/10.1145/1857927.1857932","mag":"2067228559"},"language":"en","primary_location":{"id":"doi:10.1145/1857927.1857932","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1857927.1857932","pdf_url":null,"source":{"id":"https://openalex.org/S112809824","display_name":"ACM Transactions on Reconfigurable Technology and Systems","issn_l":"1936-7406","issn":["1936-7406","1936-7414"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Reconfigurable Technology and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102114017","display_name":"Kazuki Inoue","orcid":null},"institutions":[{"id":"https://openalex.org/I96036126","display_name":"Kumamoto University","ror":"https://ror.org/02cgss904","country_code":"JP","type":"education","lineage":["https://openalex.org/I96036126"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Kazuki Inoue","raw_affiliation_strings":["Kumamoto University"],"affiliations":[{"raw_affiliation_string":"Kumamoto University","institution_ids":["https://openalex.org/I96036126"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051831948","display_name":"Qian Zhao","orcid":"https://orcid.org/0000-0003-0032-1974"},"institutions":[{"id":"https://openalex.org/I96036126","display_name":"Kumamoto University","ror":"https://ror.org/02cgss904","country_code":"JP","type":"education","lineage":["https://openalex.org/I96036126"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Qian Zhao","raw_affiliation_strings":["Kumamoto University"],"affiliations":[{"raw_affiliation_string":"Kumamoto University","institution_ids":["https://openalex.org/I96036126"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109003597","display_name":"Yasuhiro Okamoto","orcid":null},"institutions":[{"id":"https://openalex.org/I96036126","display_name":"Kumamoto University","ror":"https://ror.org/02cgss904","country_code":"JP","type":"education","lineage":["https://openalex.org/I96036126"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Yasuhiro Okamoto","raw_affiliation_strings":["Kumamoto University"],"affiliations":[{"raw_affiliation_string":"Kumamoto University","institution_ids":["https://openalex.org/I96036126"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5091660539","display_name":"Hiroki Yosho","orcid":null},"institutions":[{"id":"https://openalex.org/I96036126","display_name":"Kumamoto University","ror":"https://ror.org/02cgss904","country_code":"JP","type":"education","lineage":["https://openalex.org/I96036126"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Hiroki Yosho","raw_affiliation_strings":["Kumamoto University"],"affiliations":[{"raw_affiliation_string":"Kumamoto University","institution_ids":["https://openalex.org/I96036126"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012465812","display_name":"Motoki Amagasaki","orcid":"https://orcid.org/0000-0002-5196-9765"},"institutions":[{"id":"https://openalex.org/I96036126","display_name":"Kumamoto University","ror":"https://ror.org/02cgss904","country_code":"JP","type":"education","lineage":["https://openalex.org/I96036126"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Motoki Amagasaki","raw_affiliation_strings":["Kumamoto University"],"affiliations":[{"raw_affiliation_string":"Kumamoto University","institution_ids":["https://openalex.org/I96036126"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059705629","display_name":"Masahiro Iida","orcid":"https://orcid.org/0000-0002-9654-2319"},"institutions":[{"id":"https://openalex.org/I96036126","display_name":"Kumamoto University","ror":"https://ror.org/02cgss904","country_code":"JP","type":"education","lineage":["https://openalex.org/I96036126"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Masahiro Iida","raw_affiliation_strings":["Kumamoto University"],"affiliations":[{"raw_affiliation_string":"Kumamoto University","institution_ids":["https://openalex.org/I96036126"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5031401749","display_name":"Toshinori Sueyoshi","orcid":null},"institutions":[{"id":"https://openalex.org/I96036126","display_name":"Kumamoto University","ror":"https://ror.org/02cgss904","country_code":"JP","type":"education","lineage":["https://openalex.org/I96036126"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Toshinori Sueyoshi","raw_affiliation_strings":["Kumamoto University"],"affiliations":[{"raw_affiliation_string":"Kumamoto University","institution_ids":["https://openalex.org/I96036126"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5102114017"],"corresponding_institution_ids":["https://openalex.org/I96036126"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.16468804,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":"4","issue":"1","first_page":"1","last_page":"24"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8128393292427063},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.6141815781593323},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.5905285477638245},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.5510174632072449},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5293508172035217},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.5267956852912903},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.48282894492149353},{"id":"https://openalex.org/keywords/logic-block","display_name":"Logic block","score":0.47752630710601807},{"id":"https://openalex.org/keywords/granularity","display_name":"Granularity","score":0.4523228406906128},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.436614990234375},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.42583024501800537},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.4255332052707672},{"id":"https://openalex.org/keywords/lookup-table","display_name":"Lookup table","score":0.4162582457065582},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.39304620027542114},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3322928547859192},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.31389936804771423},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.1735476851463318},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09280654788017273},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.08237430453300476}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8128393292427063},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.6141815781593323},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.5905285477638245},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.5510174632072449},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5293508172035217},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.5267956852912903},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.48282894492149353},{"id":"https://openalex.org/C2778325283","wikidata":"https://www.wikidata.org/wiki/Q1125244","display_name":"Logic block","level":3,"score":0.47752630710601807},{"id":"https://openalex.org/C177774035","wikidata":"https://www.wikidata.org/wiki/Q1246948","display_name":"Granularity","level":2,"score":0.4523228406906128},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.436614990234375},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.42583024501800537},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.4255332052707672},{"id":"https://openalex.org/C134835016","wikidata":"https://www.wikidata.org/wiki/Q690265","display_name":"Lookup table","level":2,"score":0.4162582457065582},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.39304620027542114},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3322928547859192},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.31389936804771423},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.1735476851463318},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09280654788017273},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.08237430453300476},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1857927.1857932","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1857927.1857932","pdf_url":null,"source":{"id":"https://openalex.org/S112809824","display_name":"ACM Transactions on Reconfigurable Technology and Systems","issn_l":"1936-7406","issn":["1936-7406","1936-7414"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Reconfigurable Technology and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.49000000953674316}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1490336731","https://openalex.org/W1494778468","https://openalex.org/W1505060907","https://openalex.org/W1512143714","https://openalex.org/W1522950391","https://openalex.org/W1523051745","https://openalex.org/W1597620877","https://openalex.org/W1977850862","https://openalex.org/W2035626076","https://openalex.org/W2035847677","https://openalex.org/W2058451007","https://openalex.org/W2058686619","https://openalex.org/W2072249022","https://openalex.org/W2104449965","https://openalex.org/W2121327150","https://openalex.org/W2126255765","https://openalex.org/W2150281391","https://openalex.org/W2165055337"],"related_works":["https://openalex.org/W2366554144","https://openalex.org/W2003435315","https://openalex.org/W2024574431","https://openalex.org/W4239932082","https://openalex.org/W2083030004","https://openalex.org/W2140645577","https://openalex.org/W2477477398","https://openalex.org/W2113469110","https://openalex.org/W21706283","https://openalex.org/W2154203817"],"abstract_inverted_index":{"In":[0,46,153],"the":[1,6,54,72,112,123,151,154,162,178,190],"present":[2,155],"study,":[3],"we":[4,52,101],"investigate":[5],"use":[7],"of":[8,56,74,125,168,172,198],"reconfigurable":[9],"logic":[10,105,148],"devices":[11,66],"(RLDs)":[12],"as":[13],"intellectual":[14],"properties":[15],"(IPs)":[16],"for":[17,122,161],"system":[18],"on":[19,68,135],"a":[20,85,103,136,157,196],"chip":[21],"(SoC).":[22],"Using":[23,187],"RLDs,":[24],"SoCs":[25],"can":[26,87,110,143],"achieve":[27,89],"both":[28],"high":[29,32,90],"performance":[30,91],"and":[31,43,64,116,127,146,177,183],"flexibility.":[33],"However,":[34],"conventional":[35],"RLDs":[36,59],"have":[37],"problems":[38],"related":[39],"to":[40,48,79,97],"performance,":[41],"area,":[42],"power":[44],"consumption.":[45],"order":[47],"resolve":[49],"these":[50],"problems,":[51],"investigated":[53],"features":[55],"RLD":[57,76],"architecture.":[58,70,99],"are":[60,95,120,175],"classified":[61],"into":[62],"fine-grained":[63,115],"coarse-grained":[65,117],"based":[67,134],"their":[69],"Generally,":[71],"granularity":[73],"an":[75],"is":[77,133,164,185,193],"limited":[78],"either":[80],"type,":[81],"which":[82,119,142],"means":[83],"that":[84,94,109],"device":[86],"only":[88],"in":[92],"applications":[93],"suited":[96],"its":[98],"Therefore,":[100],"propose":[102],"variable-grain":[104],"cell":[106],"(VGLC)":[107],"architecture":[108,160],"overcome":[111],"trade-off":[113,179],"between":[114,180],"architectures,":[118],"required":[121],"implementation":[124],"random":[126,147],"arithmetic":[128,145],"logics,":[129],"respectively.":[130],"The":[131],"VGLC":[132,163],"4-bit":[137],"adder":[138],"including":[139],"configuration":[140],"bits,":[141],"perform":[144],"operations":[149],"unlike":[150],"LUT.":[152],"paper,":[156],"local":[158,169,188],"interconnection":[159],"proposed.":[165],"Several":[166],"types":[167],"interconnections":[170],"composed":[171],"different":[173],"crossbars":[174],"compared,":[176],"hardware":[181],"resources":[182],"flexibility":[184],"discussed.":[186],"interconnection,":[189],"routing":[191],"area":[192],"reduced":[194],"by":[195],"maximum":[197],"49%.":[199]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}